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http://dx.doi.org/10.13089/JKIISC.2021.31.3.309

Efficient ARIA Cryptographic Extension to a RISC-V Processor  

Lee, Jin-jae (Pusan National University)
Park, Jong-uk (Pusan National University Internet of Things Research Center)
Kim, Min-jae (Pusan National University)
Kim, Ho-won (Pusan National University)
Abstract
In this study, an extension instruction set for high-speed operation of the ARIA block cipher algorithm on RISC-V processor is added to support high-speed cryptographic operation on low performance IoT devices. We propose the efficient ARIA cryptographic instruction set which runs on a conventional 32-bit processor. Compared to the existing software cryptographic operation, there is a significant performance improvement with proposed instruction set.
Keywords
RISC-V; ARIA; ISA;
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