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http://dx.doi.org/10.13089/JKIISC.2021.31.2.187

A Study of FPGA Hardware Trojan Detection Using Bitstream Reverse-Engineering  

Cho, Mingi (Information Security Lab, GSI, Yonsei University)
Jeong, Seyeon (Information Security Lab, GSI, Yonsei University)
Kwon, Taekyoung (Information Security Lab, GSI, Yonsei University)
Publication Information
Journal of the Korea Institute of Information Security & Cryptology / v.31, no.2, 2021 , pp. 187-195 More about this Journal
Abstract
The hardware Trojan that can be loaded into an FPGA-based system during the development phase is a serious security problem. The conventional hardware Trojan detection techniques, such as side channel analysis and logic testing, are widely used, however, a hardware Trojan which is inserted as the form of the bitstream can evade those detection mechanisms. Therefore, to detect hardware Trojan, a reverse-engineering of bitstream has to be considered to analysis the functionality of the implemented circuit. In this study, we examine the method for reverse-engineering the LUT information from the FPGA bitstream to the form of Boolean equation, and evaluate the performance of the proposed method.
Keywords
FPGA; Hardware Trojan;
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