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http://dx.doi.org/10.13089/JKIISC.2015.25.2.241

Optimized Binary Field Reduction Algorithm on 8-bit ATmega128 Processor  

Park, Dong-Won (Center for Information Security Technologies(CIST), Korea University)
Kwon, Heetaek (Center for Information Security Technologies(CIST), Korea University)
Hong, Seokhie (Center for Information Security Technologies(CIST), Korea University)
Abstract
In public-key cryptographic system based on finite field arithmetic, it is very important to challenge for implementing high speed operation. In this paper, we focused on 8-bit ATmega128 processor and concentrated on enhancing efficiency of reduction operation which uses irreducible polynomial $f(x)=x^{271}+x^{207}+x^{175}+x^{111}+1$ and $f(x)=x^{193}+x^{145}+x^{129}+x^{113}+1$. We propose optimized reduction algorithms which are designed to reduce repeated memory accesses by calculating final reduced values of Fast reduction. There are 53%, 55% improvement when proposed algorithm is implemented using assembly language, compare to previous Fast reduction algorithm.
Keywords
ATmega128 processor; Fast reduction; Efficient implementation;
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