1 |
J. C. Lin, S. J. Chen, and y. H. Hu, "Cycle-efficient LFSR implementation on word-based micro-architecture," IEEE Trans. on Computers, 62(4), pp. 832-838, Apr. 2013.
DOI
|
2 |
J. Glossner et al., "A software-defined communications baseband design," Proc. IEEE Comm. Magazine, 41(1), pp. 120-128, 2003.
|
3 |
X. Gu and M. Zhang, "Uniform random unber generator using Leap-ahead LFSR architecture," Proc. of ICCCS 2009, pp. 150-154, 2009.
|
4 |
A. K. Panda, P. Rajput and B. Shukla, "FPGA implementation of 8, 16 and 32 bit LFSR with maximum length feedback polynomial using VHDL," Proc. of CSNT 2012, pp. 769-771, 2012
|
5 |
N. M. Thamrin, G. Witjaksono, A. Nuruddin and M. S. Abdullah, "An enhanced hardware-based hybrid random number generator for cryptosystem," Proc. of ICIME2009, pp. 152-156, 2009
|
6 |
P. L'Ecuyer, "Random numbers for simulation," Communications of the ACM, 33(10), pp. 85-97, 1990
DOI
|
7 |
J. H. Lee, M. J. Jeon, and S. C. Kim, "Uniform random number generator using Leap-ahead LFSR architecture," Proc. of ASEA and DRBC, pp. 28-2, 2012.
|