A Secure AES Implementation Method Resistant to Fault Injection Attack Using Differential Property Between Input and Output |
Park, Jeong-Soo
(Hoseo University)
Choi, Yong-Je (ETRI) Choi, Doo-Ho (ETRI) Ha, Jae-Cheol (Hoseo University) |
1 | D. Boneh, R. DeMillo, and R. Lipton, "On the Importance of Checking Cryptographic Protocols for Faults," EUROCRYPTO' 97, LNCS 1233, pp. 37-51, 1997. |
2 | E. Biham and A. Shamir, "Differential Fault Analysis of Secret Key Cryptosystems," CRYPTO'97, LNCS 1294, pp. 513-525, 1997. |
3 | National Institute of Standards and Technology, "Advanced Encryption Standards," NIST FIPS PUB 197, 2001. |
4 | G. Piret and J. Quisquater, "A differential fault attack technique against SPN structures, with application to the AES and KHAZAD," CHES'03, LNCS 2779, pp. 77-88, 2003. |
5 | C. Giraud, "DFA on AES," Advanced Encryption Standard-AES'04, LNCS 3373, pp. 27-41, 2005. |
6 | C. Kim and J. Quisquater, "New Differential Fault Analysis on AES Key Schedule: Two Faults are enough," CARDIS'08, LNCS 5189, pp. 48-60, 2008. |
7 | M. Tunstall and D. Mukhopadhyay, "Differential fault analysis of the advanced encryption standard using a single fault," Cryptology ePrint Archive, Report 2009/575, 2009 |
8 | R. Karri, K. Wu, P. Mishra, and Y. Kim, "Concurrent error detection of fault-based side-channel cryptanalysis of 128-bit symmetric block ciphers," IEEE Design Automation Conference (DAC'01), pp. 579-584, 2001. |
9 | G. Bertoni, L. Breveglieri, I. Koren, P. Maistri, and V. Piuri, "Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard," IEE Transactions on Computers, vol 52, no. 4, pp. 492-505, 2003 DOI ScienceOn |
10 | K. Wu, R. Karri, G. Kuznetsov, and M. Goessel, "Parity based concurrent error detection for the advanced encryption standard," IEEE International Test Conference (ITC'04), pp. 1242-1248, 2004. |
11 | M. M. Kermani and A. R. Masoleh, "A Structure-independent Approach for Fault Detection Hardware Implementations of the Advanced Encryption Standard," FDTC'07, IEEE-CS, pp. 47-53, 2007. |
12 | G. Di Natale, M. L. Flottes, and B Rouzeyre, "An On-Line Fault Detection Scheme for SBoxes in Secure Circuits", IEEE International On-Line Testing Symposium, pp. 57-62, 2007. |
13 | C. H. Yen and B. F. Wu, "Simple Error Detection Methods of Hardware Implementation of Advanced Encryption Standard," IEEE Trans. on Computers, vol. 55, no. 6, pp. 720-731, 2006. DOI |
14 | H. Choukri and M. Tunstall, "Round reduction using faults," FDTC'05, pp. 13-24, 2005. |
15 | 박제훈, 배기석, 오두환, 문상재, 하재철, "AES에 대한 반복문 오류 주입 공격," 한국정보보호학회논문지, 20(6), pp. 59-65, 2010년 12월. |
16 | K. Bousselam, G. Di Natale, M. L. Flottes, and B. Rouzeyre, "Fault Detection in Crypto-Devices," In book "Fault Detection", Wei Zhang (Ed.), ISBN: 978-953- 307-037-7, InTech, March 2010. |
17 | 박정수, 최용제, 최두호, 하재철, "AES에서 입․출력 차분값에 기반한 오류 주입 공격 방어대책," 한국정보보호학회 하계학술대회 논문집, 22(1), pp. 34-38, 2012년 6월. |