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http://dx.doi.org/10.13089/JKIISC.2008.18.6A.17

DPA-Resistant Logic Gates and Secure Designs of SEED and SHA-1  

Baek, Yoo-Jin (Samsung Electronics)
Publication Information
Journal of the Korea Institute of Information Security & Cryptology / v.18, no.6A, 2008 , pp. 17-25 More about this Journal
Abstract
The differential power attack (DPA)[8] is a very powerful side-channel attack tool against various cryptosystems and the masking method[10] is known to be one of its algorithmic countermeasures. But it is non-trivial to apply the masking method to non-linear functions, especially, to arithmetic adders. This paper proposes simple and efficient masking methods applicable to arithmetic adders. For this purpose, we use the fact that every combinational logic circuit (including the adders) can be decomposed into basic logic gates (AND, OR, NAND, NOR, XOR, XNOR, NOT) and try to devise efficient masking circuits for these basic gates. The resulting circuits are then applied to the arithmetic adders to get their masking algorithm. As applications, we applied the proposed masking methods to SEED and SHA-1 in hardware.
Keywords
Differential Power Attack; Masking Method; Logic Gates; Adder; SEED; SHA-1;
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