CHES 2020을 중심으로 살펴본 SW/HW 암호 분석 및 구현 기술 연구 동향 |
An, Sang-U
(국민대학교 금융정보보안학과)
Song, Jin-Gyo (국민대학교 금융정보보안학과) Park, Bo-Seon (국민대학교 정보보안암호수학과) Seo, Seok-Chung (국민대학교 정보보안암호수학과) |
1 | Kim, J.H., Oh, K.H., Choi, Y.J., Kim, T.S., Choi, D.H. (2013). Technical Trends of Side Channel Analysis System. Electronics and Telecommunications Trends. ETRI, 2013(3), 47-56 |
2 | Bhasin, S., Breier, J., Hou, X., Jap, D., Poussier, R., & Sim, S. M. (2019). SITM: See-In-The-Middle Side-Channel Assisted Middle Round Differential Cryptanalysis on SPN Block Ciphers. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(1), 95-122. |
3 | Kannwischer, M. J., Pessl, P., & Primas, R. (2020). Single-Trace Attacks on Keccak. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(3), 243-268. DOI |
4 | De Meyer, L. (2019). Recovering the CTR_DRBG state in 256 traces. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(1), 37-65. DOI |
5 | Gao, S., Marshall, B., Page, D., & Oswald, E. (2019). Share-slicing: Friend or Foe?. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(1), 152-174. |
6 | Genkin, D., Poussier, R., Sim, R. Q., Yarom, Y., & Zhao, Y. (2019). Cache vs. Key-Dependency: Side Channeling an Implementation of Pilsung. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(1), 231-255. |
7 | Valiveti, A., & Vivek, S. (2020). Second-Order Masked Lookup Table Compression Scheme. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 129-153. DOI |
8 | Sasdrich, P., Bilgin, B., Hutter, M., & Marson, M. E. (2020). Low-Latency Hardware Masking with Application to AES. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(2), 300-326. |
9 | K, K., Roy, I., Rebeiro, C., Hazra, A., & Bhunia, S. (2020). FEDS: Comprehensive Fault Attack Exploitability Detection for Software Implementations of Block Ciphers. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(2), 272-299. |
10 | Zhang, Z., & Liu, P. (2020). A Hybrid-CPU-FPGA-based Solution to the Recovery of Sha256crypt-hashed Passwords. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 1-23. DOI |
11 | Krautter, J., Gnad, D., & Tahoori, M. (2020). CPAmap: On the Complexity of Secure FPGA Virtualization, Multi-Tenancy, and Physical Design. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(3), 121-146. DOI |
12 | Zhang, N., Yang, B., Chen, C., Yin, S., Wei, S., & Liu, L. (2020). Highly Efficient Architecture of NewHope-NIST on FPGA using Low-Complexity NTT/INTT. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(2), 49-72. |
13 | Zaid, G., Bossuet, L., Habrard, A., & Venelli, A. (2019). Methodology for Efficient CNN Architectures in Profiling Attacks. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(1), 1-36. |
14 | Hoang, A.-T., Hanley, N., & O'Neill, M. (2020). Plaintext: A Missing Feature for Enhancing the Power of Deep Learning in Side-Channel Analysis? Breaking multiple layers of side-channel countermeasures. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 49-85. DOI |
15 | Zhang, J., Zheng, M., Nan, J., Hu, H., & Yu, N. (2020). A Novel Evaluation Metric for Deep Learning-Based Side Channel Analysis and Its Extended Application to Imbalanced Data. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(3), 73-96. DOI |
16 | Bermudo Mera, J. M., Karmakar, A., & Verbauwhede, I. (2020). Time-memory trade-off in Toom-Cook multiplication: an application to module-lattice based cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(2), 222-244. DOI |
17 | Alkim, E., Alper Bilgin, Y., Cenk, M., & Gerard, F. (2020). Cortex-M4 optimizations for {R,M} LWE schemes. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(3), 336-357. |
18 | Fritzmann, T., Sigl, G., & Sepulveda, J. (2020). RISQ-V: Tightly Coupled RISC-V Accelerators for Post-Quantum Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 239-280. DOI |
19 | Hamburg, M. (2020). Faster Montgomery and double-add ladders for short Weierstrass curves. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 189-208. DOI |
20 | Jancar, J., Sedlacek, V., Svenda, P., & Sys, M. (2020). Minerva: The curse of ECDSA nonces : Systematic analysis of lattice attacks on noisy leakage of bit-length of ECDSA nonces. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(4), 281-308. |
21 | Alpirez Bock, E., Amadori, A., Brzuska, C., & Michiels, W. (2020). On the Security Goals of White-Box Cryptography. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(2), 327-357. |
22 | Goubin, L., Rivain, M., & Wang, J. (2020). Defeating State-of-the-Art White-Box Countermeasures with Advanced Gray-Box Attacks. IACR Transactions on Cryptographic Hardware and Embedded Systems, 2020(3), 454-482. DOI |