Concept Development of a Simplified FPGA based CPCS for Optimizing the Operating Margin for I-SMRs

The Core Protection Calculator System (CPCS) is vital for plant safety as it ensures the required Specified Acceptance Fuel Design Limit (SAFDL) are not exceeded. The CPCS generates trip signals when Departure from Nucleate Boiling Ratio (DNBR) and Local Power Density (LPD) exceeds their predetermined setpoints. These setpoints are established based on the operating margin from the analysis that produces the SAFDL values. The goal of this research is to create a simplified CPCS that optimizes operating margin for I-SMRs. Because the I-SMR is compact in design, instrumentation placement is a challenge, as it is with Ex-core detectors and RCP instrumentation. The proposed CPCS addresses the issue of power flux measurement with In-Core Instrumentation (ICI), while flow measurement is handled with differential pressure transmitters between Steam Generators (SG). Simplification of CPCS is based on a Look-Up-Table (LUT) for determining the CEA groups' position. However, simplification brings approximations that result in a loss of operational margin, which necessitates compensation. Appropriate compensation is performed based on the result of analysis. FPGAs (Field Programmable Gate Arrays) are presented as a way to compensate for the inadequacies of current systems by providing faster execution speeds and a lower Common Cause Failure rate (CCF).