Browse > Article
http://dx.doi.org/10.46670/JSST.2021.30.4.261

Simple SPICE memristor model for neuromorphic system  

Choi, Gyumin (School of Electronic and Electrical Engineering, Kyungpook National University)
Park, Byeong-Jun (School of Electronic and Electrical Engineering, Kyungpook National University)
Rue, Gi-Hong (School of Electronic and Electrical Engineering, Kyungpook National University)
Hahm, Sung-Ho (School of Electronic and Electrical Engineering, Kyungpook National University)
Publication Information
Journal of Sensor Science and Technology / v.30, no.4, 2021 , pp. 261-266 More about this Journal
Abstract
A simple memristor model is proposed for the neuromorphic system in the Simulation Program for Integrated Circuits Emphasis (SPICE). The memristive I-V characteristics with different voltage and frequencies were analyzed. And with the model, we configured a learning and inference system with 4 by 4 memristor array to show the practical use of the model. We examined the applicability by configuring the simplest neuromorphic circuit. The total simulation time for the proposed model was 18% lesser than that for the one-memristor model. When compared with more memristor models in a circuit, the time became even shorter.
Keywords
Memristor; RRAM; ReRAM; SPICE; Neuromorphic; Learning; Inference;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Z. Biolek, D. Biolek, and V. Biolkova, "SPICE model of memristor with nonlinear dopant drift", Radioengeering, Vol. 18, No. 2, 2009.
2 D. Batas and H. Fiedler, "A memristor SPICE implementation and a new approach for magnetic flux-controlled memristor modeling", IEEE Trans. Nanotechno., Vol. 10, No. 2, pp. 250-255, 2011.   DOI
3 L. Shi, G. Zheng, B. Tian, B. Dkhil, and C. Duan, "Research progress on solutions to the sneak path issue in memristor crossbar arrays", Nanoscale Adv., Vol. 2, No. 5, pp. 1811-1827, 2020.   DOI
4 A. Rak, and G. Cserey, "Macromodeling of the memristor in SPICE", IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., Vol. 29, No. 4, pp.632-636, 2010.   DOI
5 A. F. Adzmi, A. Nasrudin, W. F. H. Abdullah, and S. H. Herman, "Memristor Spice model for designing analog circuit", 2012 IEEE Stud. Conf. Res. Dev. (SCOReD), pp. 78-83, Pulau Pinang, Malaysia, 2012.
6 M. Kimura, R. Sumida, A. Kurasaki, T. Imai, Y. Takishita, and Y. Nakashima, "Amorphous metal oxide semiconductor thin film, analog memristor, and autonomous local learning for neuromorphic systems", Sci. Rep., Vol. 11, No.1, pp. 1-7, 2021.   DOI
7 C. Yakopcic, T. M. Taha, G. Subramanyam, and R. E. Pino, "Memristor SPICE model and crossbar simulation based on devices with nanosecond switching time", The 2013 Int. Jt. Conf. Neural Netw. (IJCNN), pp. 1-7, Dallas, USA, 2013.
8 D. B. Strukov, G. S. Snider, D. R. Stewart and R. S. Williams, "The missing memristor found", Nature, Vol. 453, No. 7191, pp. 80-83, 2008.   DOI
9 H. Abdalla and M. D. Pickett, "SPICE modeling of memristors", 2011 IEEE Int. Symp. Circuits and Syst. (ISCAS), pp. 1832-1835, Rio de Janeiro, Brazil, 2011.
10 M. J. Sharifi and Y. M. Banadaki, "General spice models for memristor and application to circuit simulation of memristor-based synapses and memory cells", J. Circuits Syst. Comput., Vol. 19, No. 2, pp. 407-424, 2010.   DOI
11 M. Chu, B. Kim, S. Park, H. Hwang, M. Jeon, B. H. Lee, and B. G. Lee, "Neuromorphic hardware system for visual pattern recognition with memristor array and CMOS neuron", IEEE Trans. Ind. Electron., Vol. 62, No. 4, pp. 2410-2419, 2015.   DOI
12 M. Prezioso, F. Merrikh-Bayat, B. D. Hoskins, G. C. Adam, K. K. Likharev, and D. B. Strukov, "Training and operation of an integrated neuromorphic network based on metal-oxide memristors", Nature, Vol. 521, pp. 61-64, 2015.   DOI
13 G. Kim, K. Kim, S. Choi, H. J. Jang, and S. O. Jung, "Area- and energy-efficient STDP learning algorithm for spiking neural network SoC", IEEE Access, Vol. 8, pp. 216922-216932, 2020.   DOI
14 G. K. Chen, R. Kumar, H. E. Sumbul, P. C. Knag, and R. K. Krishnamurthy, "A 4096-Neuron 1M-Synapse 3.8-pJ/SOP spiking neural network with on-chip STDP learning and sparse weights in 10-nm FinFET CMOS", IEEE J. Solid-State Circuits., Vol. 54, No. 4, pp. 992-1002, 2019.   DOI
15 Y. S. Yang and Y. Kim, "Recent trend of neuromorphic computing hardware: Intel's neuromorphic system perspective", 2020 Int. SoC Des. Conf. (ISOCC), pp. 218-219, Yeosu, South Korea, 2020.
16 J. Misra, I. Saha, "Artificial neural networks in hardware: A survey of two decades of progress", Neurocomputing, Vol. 74, No. 1-3, pp. 239-255, 2010.   DOI
17 J. J. Lee, J. Park, M. W. Kwon, S. Hwang, H. Kim, and B. G. Park, "Integrated neuron circuit for implementing neuromorphic system with synaptic device", Solid State Electron., Vol. 140, pp. 34-40, 2018.   DOI
18 S. H. Lee, H. L. Park, M. H. Kim, M. H. Kim, B. G. Park, and S. D. Lee, "Realization of Biomimetic Synaptic Functions in a One-Cell Organic Resistive Switching Device Using the Diffusive Parameter of Conductive Filaments", ACS Appl. Mater. Interfaces., Vol. 12, No. 46, pp. 51719-51728, 2020   DOI
19 H. Kim, S. Cho, M. C. Sun, J. Park, S. Hwang, and B. G. Park, "Simulation Study on Silicon-Based Floating Body Synaptic Transistor with Short- and Long-Term Memory Functions and Its Spike Timing-Dependent Plasticity", J. Semicond. Technol. Sci., Vol. 16, No. 5, pp. 657-663, 2016.   DOI
20 F. Gul, "Addressing the sneak-path problem in crossbar RRAM devices using memristor-based one Schottky diode-one resistor array", Results Phys., Vol. 12, pp. 1091-1096, 2019.   DOI
21 S. Choi, S. H. Tan, Z. Li, Y. Kim, C. Choi, P. Y. Chen, H. Chen, S. Yu, and J. Kim, "SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations", Nat. Mater., Vol. 17, No. 4, pp. 335-340, 2018.   DOI
22 Y. Sun, C. Song, J. Yin, X. Chen, Q. Wan, F. Zeng, and F. Pan, "Guiding the Growth of a Conductive Filament by Nanoindentation To Improve Resistive Switching", ACS Appl. Mater. Interfaces, Vol. 9, No. 39, pp. 34064-34070. 2017.   DOI