1 |
A. M. Ionescu and H. Riel, "Tunnel field-effect transistors as energy-efficient electronic switches", Nature, Vol. 479, No. 7373, pp. 329-337, 2011.
DOI
|
2 |
A. C. Seabaugh and Q. Zhang, "Low-voltage tunnel transistors for beyond CMOS logic", Proc. IEEE, Vol. 98, No. 12, pp. 2095-2110, 2010.
DOI
|
3 |
F. Mayer, C. Royer, J. Damlencourt, K. Romanjek, F. Anderieu, C. Tabone, B. Previtali, and S. Deleonibus, "Impact of SOI, Si1-xGexOI and GeOI substrates on CMOS compatible tunnel FET performance", in 2008 IEEE Int. Electron Devices Meet., pp. 1-5, San Francisco, USA, 2008.
|
4 |
A. Bowonder, P. Patel, K. Jeon, J. Oh, P. Majhi, H. Tseng, and C. Hu, "Low-voltage green transistor using ultra shallow junction and hetero-tunneling", in Proc. IEEE Int. Workshop Junction Technol., pp. 93-96, Shanghai, China, 2008.
|
5 |
K. Bhuwalka, S. Sedlmaier, A. Ludsteck, C. Tolksdorf, J. Schulze, and I. Eisele, "Vertical tunnel field-effect transistor", IEEE Trans. Electron Devices, Vol. 51, No. 2, pp. 279-282, 2004.
DOI
|
6 |
H. Lu and A. Seabaugh, "Tunnel field-effect transistors: State-of-the-art", IEEE J. Electron Devices Soc., Vol. 2, No. 4, pp. 44-49, 2014.
DOI
|
7 |
M. A. Khayer and R. K. Lake, "Drive currents and leakage currents in InSb and InAs nanowire and carbon nanotube band-to-band tunneling FETs", IEEE Electron Device. Lett., Vol. 30, No. 12, pp. 1257-1259, 2009.
DOI
|
8 |
H. Schmid, K. E. Moselund, M. T. Bjork, M. Richter, H. Ghoneim, C. D. Bessire, and H. Riel, "Fabrication of Vertical InAs-Si Heterojunction Tunnel Field Effect Transistors", in 69th Device Res. Conf., pp. 181-182, Santa Barbara, USA, 2011.
|
9 |
H. Riel, K. E. Moselund, C. Bessire, M. T. Bjork, A. Schenk, H. Ghoneim, H. Schmid, "InAs-Si Heterojunction Nanowire Tunnel Diodes and Tunnel FETs", in 2012 IEEE Int. Electron Devices Meet., pp. 16.6.1-16.6.4, San Fransisco, USA, 2012.
|
10 |
K. Tomioka and T. Fukui, "Tunnel field-effect transistor using InAs nanowire/Si heterojunction", Appl. Phys. Lett., Vol. 98, pp. 083114(1)-083114(3), 2011.
DOI
|
11 |
E. Memisevic, J. Svensson, E. Lind, and L.-E. Wernersson, "Vertical Nanowire TFETs with Channel Diameter Down to 10 nm and Point S MIN of 35 mV/Decade", IEEE Electron Device. Lett., Vol. 39, No. 7, pp. 1089-1091, 2018.
DOI
|
12 |
E. Memisevic, M. Hellenbrand, E. Lind, A. R. Persson, S. Sant, A. Schenk, J. Svensson, R. Wallenberg, and L.-E. Wernersson, "Individual Defects in InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors Operating below 60 mV/decade", Nano Lett., Vol. 17, No. 7, pp. 4373-4380, 2017.
DOI
|
13 |
X. Zhao, A. Vardi, and and J. A. Del Alamo, "Sub-Thermal Subthreshold Characteristics in Top-Down InGaAs/InAs Heterojunction Vertical Nanowire Tunnel FETs", IEEE Electron Device. Lett., Vol. 38, No. 7, pp. 855-858, 2017.
DOI
|
14 |
A. Alian, S. E. Kazzi, A. Verhulst, A. Milenin, N. Pinna, T. Ivanov, D. Lin, D. Mocuta, and N. Collaert, "Record 47 mV/dec top-down vertical nanowire InGaAs/GaAsSb tunnel FETs", in 2018 VLSI Symp. Tech. Dig., pp. 133-134, Honolulu, USA, 2018.
|
15 |
M. Noguchi, S. H. Kim, M. Yokoyama, O. Ichikawa, T. Osada, M. Hata, M. Takenaka, and S. Takagi, "High Ion/Ioff and low subthreshold slope planar-type InGaAs tunnel field effect transistors with Zn-diffused source junctions", J. Appl. Phys., Vol. 118, pp. 045712(1)-045712(15), 2015.
DOI
|
16 |
X. Zhao, A. Vardi, and J. A. Del Alamo, "InGaAs/InAs heterojunction vertical nanowire tunnel FETs fabricated by a top-down approach", in 2014 IEEE Int. Electron Devices Meet., pp. 590-593, San Fransisco, USA, 2014.
|
17 |
J.-M. Baek, H.-B. Jo, D.-Y. Yun, I.-G. Lee, C.-S. Shin, H. Kim, D.-H. Ko, T.-W. Kim, and D.-H. Kim, "Vertical InGaAs tunnel-field-effect transistors by an electro-plating fin formation technique", Solid-State Electron., Vol. 164, pp. 107681(1)-107681(5), 2020.
|
18 |
Q. Smets, A. S. Verhulst, E. Simoen, D. Gundlach, C. Richter, N. Collaert, and M. M. Heyns, "Calibration of Bulk Trap-Assisted Tunneling and Schokely-Read-Hall Currents and Impact on InGaAs Tunnel-FETs", IEEE Trans. Electron Devices, Vol. 64, No. 9, pp 3622-3626, 2017.
DOI
|
19 |
Y. Zhu, D. K. Mohata, S. Datta, and M. K. Hudait, "Reliability Studies on High-Temperature Operation of Mixed As/Sb Staggered Gap Tunnel FET Material and Devices", IEEE Trans. Devices Mater. Reliab., Vol. 14, No. 1, pp 245-254, 2014.
DOI
|
20 |
H. Zhao, Y. Chen, Y. Wang, F. Zhou, and J. Lee, "InGaAs Tunneling Field-Effect-Transistors With Atomic-Layer-Deposited Gate Oxides", IEEE Trans. Electron Devices, Vol. 58, No. 9, pp. 2990-2995, 2011.
DOI
|