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http://dx.doi.org/10.5369/JSST.2015.24.4.252

Design of 8-bit Single Slope ADC for Signal Processing of Multiple Image Sensors  

Lee, Jong-Cheol (School of Electrical Engineering, Kyungpook National Unversity)
Lee, Sang-Hoon (School of Electrical Engineering, Kyungpook National Unversity)
Kim, Jin-Tae (School of Electrical Engineering, Kyungpook National Unversity)
Park, Jae-Roul (Gyungbuk Institute of IT Convergence Industry Technology)
Shin, Jang-Kyoo (School of Electrical Engineering, Kyungpook National Unversity)
Choi, Pyung (School of Electrical Engineering, Kyungpook National Unversity)
Publication Information
Journal of Sensor Science and Technology / v.24, no.4, 2015 , pp. 252-257 More about this Journal
Abstract
This paper proposes a single slope A/D converter (SSADC) that is possible to process the signal of the ultraviolet, visible and infrared rays with a single chip. And the proposed SSADC is a type of single channel ADC. In the conventional SSADC, it is possible to process the only one signal with a kind of the sensor because the speed of the operating frequency and the slope of ramp signal generated by the ramp generator are fixed. In order to improve the disadvantages, a ramp generator which has variable slope in ramp function is designed and $3{\times}1$ MUX(multiplexer) is adopted so that we can change the speed of the operating frequency and the slope of ramp signal. Therefore, the multiple signal processing of the wanted sensors can be possible. The designed circuit is layout by the $0.35-{\mu}m$ CMOS 2-poly 4-metal technology process and is checked through DRC and LVS tools.
Keywords
Single slope A/D converter; Ultraviolet rays; Visible lights; Infrared rays; Image sensors;
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1 Linda E. M. Brackenbury, Luis A. Plana and Jeffrey Pepper, "System-on-chip design and implementation", IEEE Transactions on Education, Vol. 53, No. 2, pp. 272-281, 2010.   DOI
2 Brendan Mullane, Vincent O'Brien, Ciaran MacNamee, and Thomas Fleischmann, "An SOC platform for ADC test and measurement", Design and Diagnostic of Electronic Circuits & Systems, pp. 4-7, 2009.
3 Malika Alami Markatani, Stephane Vivien, Laurent Simony, Ali Ahaitouf and Abdelaziz Ahaitouf, " A succssive-approximation ADC for CMOS image sensors", Multimedia Computing and Systems (ICMCS), pp. 1-6, 2011.
4 Lei Shi and Stoyan Nihianov, "Comparative study of silicon-based ultraviolet photodetectors", IEEE Sensors Journal, Vol. 12, No. 7, 2012.
5 J.Jesus Garicia, Jesus Urena, Alvaro Hernandez, Manuel Mazo, J. Carlos Garcia, Fernando Alvarez, J. Antonio Jimenez, Patricio Donato and M. Carmen Perez, "IR sensor array configuration and signal processing for detecting obstacles in railways", IEEE Sensor Array and Multichannel Signal Processing Workshop, pp. 216-220, 2004.
6 Choi, Abidi, "A 6b 1.3Gsample/s A/D converter in $0.35{\mu}m$ CMOS", IEEE J. Solid-State Circuits, Vol. 36, pp. 1847-1858. 2001.   DOI
7 Stojcevski. A., Singh. J., and Zayegh. A "Performance analysis of a CMOS analog to digital converter for wireless telecommunications", Proc. IEEE Devices & System Conf. ISIC-2001, Singapore, pp. 59-62, 2001.
8 K. Nagaraj, "Efficient circuit configurations for algorithmic analog to digital converters", IEEE Trans. Electron Devices, Vol. 56, No. 11, pp. 2414-2422, 2009.   DOI
9 Turker Kuyel, "Linearity testing issuses of analog to digital converters", Proceeding of International Test Conference. pp. 747-756. 1999.
10 Fang Tang, Amine Bermak, Abbes Amira, Mohieddine Amor Benammar, Debiao He and Xiaojin Zhao, "Two-step single Slope/SAR ADC with error correction for CMOS image sensor", The Scientific World Journal, pp. 1-6, 2014.
11 Jing Wang, Edgar Sanchez-Sinencio and Franco Maloberti, "Very linear ramp-generators for high resolution ADC BIST and calibration", IEEE Midwest Symposium, Vol. 1, No.1, pp. 908-911, 2000.
12 Hyoung-Taek Choi, Young-Hwa Kim, KwangSeok Kim, Jaewook Kim and SeongHwan Cho, "Time-interleaved single-slope ADC using counter-based timeto-digital converter", IEEE International Symposium on Radio-Frequency Intergration Technology, Beijing, 2011.
13 Martijn F. Snoeij, Albert J. P. Theuwissen, Kofi A. A. Makinwa and Johan H. Huijsing, " Multiple-ramp column-parallel ADC architectures for CMOS image sensors", IEEE J. Solid-State Circuits, Vol. 42, No, 12, 2007.
14 Miroslaw Zoladz, Pawel Grybos, Maciej Kachel, Piotr Kmon and Robert Szczygiel, "Analogue multiplexer for neural application in 180 nm CMOS technology", Mixed Design of Integrated Circuits & Sytems, pp. 230-233, 2009.
15 B. Provost, et al, "On-chip ramp generators for mixed-signal BIST and ADC self-test", IEEE J. Solid-State Circuits, Vol. 38, No. 2, pp. 263-273, 2003.   DOI