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http://dx.doi.org/10.6109/jkiice.2011.15.11.2465

A Design of Sign-magnitude based Multi-mode LDPC Decoder for WiMAX  

Seo, Jin-Ho (금오공과대학교 전자공학부)
Park, Hae-Won (금오공과대학교 전자공학부)
Shin, Kyung-Wook (금오공과대학교 전자공학부)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.15, no.11, 2011 , pp. 2465-2473 More about this Journal
Abstract
This paper describes a circuit-level optimization of DFU(decoding function unit) for LDPC decoder which is used in wireless communication systems including WiMAX and WLAN. A new design of DFU based on sign-magnitude arithmetic instead of two's complement arithmetic is proposed, resulting in 18% reduction of gate count for 96 DFUs array used in mobile WiMAX LDPC decoder. A multi-mode LDPC decoder for mobile WiMAX standard is designed using the proposed DFU. The LDPC decoder synthesized using a 0.18-${\mu}m$ CMOS cell library with 50 MHz clock has 268,870 gates and 71,424 bits RAM, and it is verified by FPGA implementation.
Keywords
LDPC(low density parity check) code; error correction code; min-sum algorithm; IEEE 802.16e;
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