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http://dx.doi.org/10.6109/jkiice.2010.14.2.445

A Design of Direct Memory Access (DMA) Controller For H.264 Encoder  

Song, In-Keun (우송대학교 철도전기 시스템학과)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.14, no.2, 2010 , pp. 445-452 More about this Journal
Abstract
In this paper, an attempt has been made to design the controller applicable for H.264 level3 encoder of baseline profile on full hardware basis. The designed controller module first stores the images supplied from CMOS Image Sensor(CIS) at main memory, and then reads or stores the image data in macroblock unit according to encoder operation. The timing cycle of the DMA controller required to process a macroblock is 478 cycles. In order to verify the our design, reference-C encoder, which is compatible to JM 9.4, is developed and the designed controller is verified by using the test vector generated from the reference C code. The number of cycle in the designed DMA controller is reduced by 40% compared with the cycle of using Xilinx MIG.
Keywords
DMA; H.264; Encoder; SDRAM;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
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