Browse > Article
http://dx.doi.org/10.6109/jkiice.2010.14.12.2691

Design of Compiler & Variable-Length Instructions for SIMD Structured Shader  

Kwak, Jae-Chang (서경대학교 컴퓨터과학과)
Park, Tae-Ryoung (서경대학교 컴퓨터공학과)
Abstract
Shader instructions and Compiler are designed for supporting 3D graphic shader 3.0 API. Variable-length instructions are proposed to reduce the size of hardware of graphic processor in SIMD structure by shortening the length of instructions. The designed shader compiler supports variable and two phased structured instructions, and can be programmable at ESSL level. Conformance Test proposed by Khronos group is accomplished to verify the design result of instructions and complier. The test result shows overall average 37% performance improvement at the 16 functions of basic GL shader.
Keywords
3D graphics; Shader; Shader Instruction; Shader Compiler;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Jeong-Ho Woo, et al. "A 195mW, 9.1MVertices/s fully programmable 3D graphics processor for low power mobile device", Solid-State Circuits Conference, 2007
2 J.H Sohn, et al., "A 155-mW 50-Mvertices/s Graphics Processor With Fixed-Point Programmable Vertex shader for Mobile Applications", IEEE J.l of Solid State Circuits, Vol 41, No. 5, pp.1081-1091, May, 2006   DOI   ScienceOn
3 Mauricio Breternitz, Jr., "Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a GP-CPU" Proc. of the 12th int'l conference on parallel architectures and compilation techniques.
4 ARM http://www.arm.com/
5 Microsoft Shader3.0, http://msdn.microsoft.com
6 H.K. Jeong, "Design of 3D Graphics Geometry Accelerator using the Programmable Vertex Shader" ITC-CSCC 2006.