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Implementation of Wave Digital Filters Based on Multiprocessor Architecture  

Kim, Hyeong-Kyo (한신대학교 정보통신학과)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.10, no.12, 2006 , pp. 2303-2307 More about this Journal
Abstract
The round off noise properties of wave digital filters have known and desirable properties in respect to their realization with short coefficient wordlengths. This paper presents the optimal implementation of wave digital filters by employing multiprocessor archtectures in the sense of input sampling rate, the number of processors, and input-output delay. The implementation will be specified by complete circuit diagrams including control signals, and can be applied to an existing silicon complier for VLSI layout generation.
Keywords
Wave Digital Filter; FSFG; IPB; PB; PDB; Cyclo-static scheduler;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
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