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Analysis on the Threshold Voltage of Nano-Channel MOSFET  

정정수 (군산대학교 전자정보공학부)
김재홍 (군산대학교 전자정보공학부)
고석웅 (군산대학교 전자정보공학부)
이종인 (군산대학교 전자정보공학부)
정학기 (군산대학교 전자정보공학부)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.6, no.1, 2002 , pp. 109-114 More about this Journal
Abstract
In this paper, we have presented the simulation results ah)ut threshold voltage for Si-based MOSFETs with channel length of nano scale. We simulated the Si-based n channel MOSFETs with gate lengths from 180 to 30 nm in accordance to the constant voltage scaling theory and the lateral scaling. These MOSFETs had the lightly doped drain(LDD) structure, which is used for the reduction of electric field magnitude and short channel effects at the drain region. The stronger electric field at this region is due to scaling down. We investigated and analyzed the threshold voltage of these devices. This analysis will provide insight into some applicable limitations at the ICs and used for basis data at VLSI.
Keywords
MOSFET; LDD; short channel effects; threshold voltage; VLSI;
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