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http://dx.doi.org/10.12673/jant.2011.15.2.213

Low Complexity Channel Preprocessor for Multiple Antenna Communication Systems  

Hwang, You-Sun (School of Electronics, Telecommunication and Computer Eng., Korea Aerospace University)
Jang, Soo-Hyun (School of Electronics, Telecommunication and Computer Eng., Korea Aerospace University)
Han, Chul-Hee (Samsung Thales, Co. Ltd.)
Choi, Sung-Nam (Samsung Thales, Co. Ltd.)
Jung, Yun-Ho (School of Electronics, Telecommunication and Computer Eng., Korea Aerospace University)
Publication Information
Journal of Advanced Navigation Technology / v.15, no.2, 2011 , pp. 213-220 More about this Journal
Abstract
In this paper, the channel preprocessor with an area-efficient architecture is proposed for the MIMO symbol detector which can support four transmit and receive antennas. The proposed channel preprocessor can shrink the channel dimension to reduce the hardware complexity of the MIMO symbol detector. Also, the proposed channel preprocessor is implemented with very low complexity by using QR decomposition (QRD) and log-number system (LNS). By applying QRD and LNS to the nulling matrix calculation block, the numbers of matrix-multiplications and matrix-divisions are decreased and thus the complexity of the proposed channel preprocessor is significantly reduced. The proposed channel preprocessor was designed in a hardware description language (HDL) and synthesized to gate-level circuits using 0.13um CMOS standard cell library. With the proposed channel preprocessor, the number of logic gates for channel preprocessor is reduced by 20.2% compared with the conventional architecture.
Keywords
Channel Preprocessor; Log-Number System; MIMO; QR Decomposition;
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