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http://dx.doi.org/10.5139/JKSAS.2002.30.7.144

A study on the parallel processing of the avionic system computer using multi RISC processors  

Lee, Jae-Uk (국방과학연구소)
Lee, Sung-Soo (국방과학연구소)
Kim, Young-Taek (국방과학연구소)
Yang, Seung-Yul (국방과학연구소)
Kim, Bong-Gyu (국방과학연구소)
Hwang, Sang-Hyun (국방과학연구소)
Park, Deok-Bae (국방과학연구소)
Publication Information
Journal of the Korean Society for Aeronautical & Space Sciences / v.30, no.7, 2002 , pp. 144-149 More about this Journal
Abstract
This paper presents a technique for real time multiprocessor parallel processing to develop an avionic system computer(ASC) which integrates the avionics control, navigation and fire control, cursive and raster graphic symbol generation into one line replaceable unit. The proposed method has optimal performance by adopting a logically asymmetric structure between four 32bit RISC processors based on the master-slave multiprocessing, a tightly coupled interaction level with the time shared common bus and global memory, and an efficient bus arbitration algorithm. The ASC has been verified through a series of flight tests. The relevant tests also have been rigorously conducted on the prototype ASC such as electrical test, environmental test, and electromagnetic interference test.
Keywords
avionic system computer; multiprocessors; asymmetric architecture; tightly coup1ed; bus arbitration;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
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