Browse > Article

A Study on Design and Reliability Assessment for Embedded Hot-Standby Sparing FT System Using Self-Checking Logic  

Lee, Jae-Ho (한국철도기술연구원, 전기신호연구본부)
Lee, Kang-Mi (한국철도기술연구원, 전기신호연구본부)
Kim, Young-Kyu (한국철도기술연구원, 전기신호연구본부)
Shin, Duc-Ko (한국철도기술연구원, 전기신호연구본부)
Publication Information
Journal of the Korean Society for Railway / v.9, no.6, 2006 , pp. 725-731 More about this Journal
Abstract
Hot Standby sparing system detecting faults by using software, and being tolerant any faults by using Hardware Redundancy is difficult to perform quantitative reliability prediction and to detect real time faults. Therefore, this paper designs Hot Standby sparing system using hardware basis self checking logic in order to overcome this problem. It also performs failure mode analysis of Hot Standby sparing system with designed self checking logic by using FMEA (Failure Mode Effect Analysis), and identifies reliability assessment of the controller designed by quantifying the numbers of failure development by using FTA (Fault Tree Analysis)
Keywords
Hot-Standby Sparing; Self-Checking Logic; FMEA(Failure Mode Effect Analysis); Reliability; Fault-Tolerance;
Citations & Related Records
연도 인용수 순위
  • Reference
1 UIC (2003), 'ERTMS/ETCS-Class1, FMEA for Interface to/from an Adjacent RBC-in Application Level2'
2 Barry W. Johnson (1989), 'Design and Analysis of Fault-Tolerant Digital Systems'
3 Dhiraj K. Pradhan (1996), 'Fault-Tolerant computer system Design', Prentice Hall
4 MIL-STD-1629A (1980),'Procedures for Performing a FMECA'
5 김영태 (2006), '철도신호제어시스템(개정4판)'