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http://dx.doi.org/10.9766/KIMST.2017.20.4.482

Radar Signal Processor Design Using FPGA  

Ha, Changhun (Radar.PGM Research and Development Institute, Hanwha Systems)
Kwon, Bojun (The 3rd Research and Development Institute, Agency for Defense Development)
Lee, Mangyu (Radar.PGM Research and Development Institute, Hanwha Systems)
Publication Information
Journal of the Korea Institute of Military Science and Technology / v.20, no.4, 2017 , pp. 482-490 More about this Journal
Abstract
The radar signal processing procedure is divided into the pre-processing such as frequency down converting, down sampling, pulse compression, and etc, and the post-processing such as doppler filtering, extracting target information, detecting, tracking, and etc. The former is generally designed using FPGA because the procedure is relatively simple even though there are large amounts of ADC data to organize very quickly. On the other hand, in general, the latter is parallel processed by multiple DSPs because of complexity, flexibility and real-time processing. This paper presents the radar signal processor design using FPGA which includes not only the pre-processing but also the post-processing such as doppler filtering, bore-sight error, NCI(Non-Coherent Integration), CFAR(Constant False Alarm Rate) and etc.
Keywords
Radar; Signal Processing; FPGA; System Generator; CFAR;
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