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Implementation of a Real-time Multipath Fading Channel Simulator Using a Hybrid DSP-FPGA Architecture  

이주현 (한양대학교 전자컴퓨터공학부)
이찬길 (한양대학교 전자컴퓨터공학부)
Abstract
The mobile radio channel can be simulated as a complex-valued random process with narrow-band spectrum. This paper describes a real-time implementation of that process using a INS320C6414 digital signal processor and XC2VP30 Virtex FPGA. The simulator presented here is not only a comprehensive model of the flat fading but also frequency selective fading mobile channel conditions. To replicate the statistical characteristics of the multipath fading environment with the minimum computational burden, multi-rate techniques are employed to resolve practical problems such as variable sampling rate. The simulator produces accurate and consistent results due to digital implementation. It is very flexible and simple to program for various field conditions in mobile communications with a graphical user interface.
Keywords
DSP; C64x; Fading channel; Channel simulator; DSP; C64x; FPGA; Real-time implementation;
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