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http://dx.doi.org/10.7840/kics.2016.41.12.1858

A New S/W Architecture for YARA Speed Enhancement  

Kim, Chang Hoon (School of Computer and Information Technology, Daegu University)
Abstract
In this paper, a modified YARA software architecture that can perform pattern matching for multi-rule files is proposed. Based on a improved scanning thread algorithm, the new design reduces memory loading time of rule files for pattern matching. Therefore, the proposed architecture can reduce operation time for pattern matching while it requires an increased memory in proportion to the number of rule files.
Keywords
YARA; Pattern Matching; Malware Detection; Signature;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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