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Design and Verification of PCS Transmitting and Receiving Module for 40/100 Gigabit-Ethernet  

Han, Kyeong-Eun (한국전자통신연구원 광인터넷연구부)
Kim, Seung-Hwan (한국전자통신연구원 광인터넷연구부)
Ahn, Kye-Hyun (한국전자통신연구원 광인터넷연구부)
Kim, Kwang-Joon (한국전자통신연구원 광인터넷연구부)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.35, no.11B, 2010 , pp. 1579-1587 More about this Journal
Abstract
In this paper, we design the PCS(Physical Coding Sublayer) transmitting and receiving module for 400/1000 Ethernet and verify the performance of it through logic simulation. In this work, we defined each function module and internal/external control signals and implemented them using HDL programming language. We also designed 64B/66B encoding/decoding, scrambling/descrambling including operation mode, detection of invalid frames, and multi-lane based distribution/arrangement. It was simulated using ModelSim and verified in terms of the operation and timing according to input data. The simulation result shows that all designed modules in 400/100G Ethernet are correctly performed.
Keywords
40G/100G Ethernet; PCS; optical networks; logic simulation;
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