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A Novel Instruction Set for Packet Processing of Network ASIP  

Chung, Won-Young (연세대학교 전기전자공학과 프로세서 연구실)
Lee, Jung-Hee (한국전자통신연구원(ERTI) 차세대 이어넷 팀)
Lee, Yong-Surk (연세대학교 전기전자공학과 프로세서 연구실)
Abstract
In this paper, we propose a new network ASIP(Application Specific Instruction-set Processor) which was designed for simulation models by a machine descriptions language LISA(Language for Instruction Set Architecture). This network ASIP is aimed for an exclusive engine undertaking packet processing in a router. To achieve the purpose, we added a new necessary instruction set for processing a general ASIP based on MIPS(Microprocessor without Interlock Pipeline Stages) architecture in high speed. The new instructions can be divided into two groups: a classification instruction group and a modification instruction group, and each group is to be processed by its own functional unit in an execution stage. The functional unit was optimized for area and speed through Verilog HDL, and the result after synthesis was compared with the area and operation delay time. Moreownr, it was allocated to the Macro function ana low-level standardized programming language C using CKF(Compiler Known Function). Consequently, we verified performance improvement achieved by analysis and comparison of execution cycles of application programs.
Keywords
ASIP; LISA; CKF; Network router; Packet processing;
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