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Design of a Dynamically Reconfigurable Switch for Hybrid Network-on-Chip Systems  

Lee, Dong-Yeol (서강대학교 전자공학과 대학원 CAD & ES 연구실)
Hwang, Sun-Young (서강대학교 전자공학과 대학원 CAD & ES 연구실)
Abstract
This paper proposes a novel dynamically reconfigurable switch for various multimedia applications in hybrid NoC systems. Current NoC systems, which adopt hybrid NoC structure with fixed switch and job distribution algorithms, require designers to precisely predict the property of applications to be processed. This paper proposes a reconfigurable switch which minimizes buffer overflow in various multimedia applications running on an NoC system. To verify the performance of the proposed system, we performed experiments on various multimedia applications running on embedded systems, such as MPEG4 and MP3 decoder, GPS positioning system, and OFDM demodulator. Experimental results show that buffer overflow has been decreased by 41.8% and 29.0%, respectively, when compared with NoC systems having sub-clusters with mesh or star topology. Power usage has been increased by 2.3% compared with hybrid NoC systems using fixed switches, and chip area has been increased from -0.6% to 5.7% depending on sub-cluster topology.
Keywords
Reconfigurable; Switch; Network-on-Chip; Buffer Overflow; Hybrid Network;
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