1 |
A. Raghupathy and K. J. R. Liu, 'Algorithm-based low-power/high-speed Reed- Solomon decoder design,' IEEE Trans. Circuit Syst. II, vol. 47, pp. 1254-1270, Nov. 2000
|
2 |
D. V. Sarwate and N. R. Shanbhag, 'High-speed architectures for Reed- Solomon decoders,' IEEE Trans. VLSI Syst., vol. 9, pp. 641-655, Oct. 2001
DOI
ScienceOn
|
3 |
M. A. A.Ali, A. Abou-El-Azm, and M. F. Marie, 'Error rates for non-coherent demodulation FCMA with Reed-Solomon codes in fading satellite channel,' in Proc. IEEE Vehicular Techn. Conf. (VTC'99), vol. 1, 1999, pp. 92-96
|
4 |
T. K. Matsushima, T. Matsushima, and S. Hirasawa, 'Parallel architecture for high-speed Reed-Solomon codec,' in Proc. IEEE Int. Telecommun. Symp. (ITS'98), vol. 2, 1998, pp. 468-473
|
5 |
H. M. Shao, T. K. Truong, L. J. Deutsch, J. H. Yuen and I. S. Reed, “A VLSI design of a pipeline Reed-Solomon decoder,” IEEE Trans. Comput., vol. C-34, pp. 393-403, May 1985
DOI
ScienceOn
|
6 |
H. H. Lee, 'Modified Euclidean algorithm block for high-speed Reed-Solomon decoder,' IEE Electronics Letters, vol. 37, pp. 903-904, July 2001
DOI
ScienceOn
|
7 |
J. H. Jeng and T. K. Truong, 'On decoding of both errors and erasures of a Reed-Solomon code using an inverse-free Berlekamp-Massey algorithm,' IEEE Trans. Commun., vol. 47, pp. 1488-1494, Oct. 1999
DOI
ScienceOn
|
8 |
백재현, 선우명훈, '새로운 DCME 알고리즘을 사용한 고속 Reed-Solomon 복호기,' 전자공학회 논문지 제40권 SD편, 6호, 81-90쪽, 2003
|
9 |
J. H. Baek and Myung H. Sunwoo, 'Enhanced degree computationless modified Euclid's algorithm for Reed-Solomon deocder,' in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS' 2006), vol. 5, May 2006, pp. 3554-3557
|
10 |
H. H. Lee, M. L. Yu and L. Song, 'VLSI design of Reed-Solomon decoder architectures,' in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS' 2000), vol. 5, May 2000, pp. 705-708
|
11 |
J. H. Baek and Myung H. Sunwoo, 'New degree computationless modified Euclid's algorithm and architecture for Reed-Solomon decoder,' IEEE Trans. VLSI Syst., vol. 14, pp. 915-920, Aug. 2006
DOI
ScienceOn
|