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The Design of a Structure of Network Co-processor for SDR(Software Defined Radio)  

Kim, Hyun-Pil (연세대학교 전기전자공학과 프로세서 연구실)
Jeong, Ha-Young (연세대학교 전기전자공학과 프로세서 연구실)
Ham, Dong-Hyeon (연세대학교 전기전자공학과 프로세서 연구실)
Lee, Yong-Surk (연세대학교 전기전자공학과 프로세서 연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.32, no.2A, 2007 , pp. 188-194 More about this Journal
Abstract
In order to become ubiquitous world, the compatibility of wireless machines has become the significant characteristic of a communication terminal. Thus, SDR is the most necessary technology and standard. However, among the environment which has different communication protocol, it's difficult to make a terminal with only hardware using ASIC or SoC. This paper suggests the processor that can accelerate several communication protocol. It can be connected with main-processor, and it is specialized PHY layer of network The C-program that is modeled with the wireless protocol IEEE802.11a and IEEE802.11b which are based on widely used modulation way; OFDM and CDM is compiled with ARM cross compiler and done simulation and profiling with Simplescalar-Arm version. The result of profiling, most operations were Viterbi operations and complex floating point operations. According to this result we suggested a co-processor which can accelerate Viterbi operations and complex floating point operations and added instructions. These instructions are simulated with Simplescalar-Arm version. The result of this simulation, comparing with computing only one ARM core, the operations of Viterbi improved as fast as 4.5 times. And the operations of complex floating point improved as fast as twice. The operations of IEEE802.11a are 3 times faster, and the operations of IEEE802.11b are 1.5 times faster.
Keywords
SDR; IEEE802.11; OFDM; CDM;
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