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Efficient pipelined FFT processor for the MIMO-OFDM systems  

Lee, Sang-Min (연세대학교 전기전자공학과 정보통신SoC설계 연구실)
Jung, Yun-Ho (연세대학교 TMS정보기술사업단)
Kim, Jae-Seok (연세대학교 전기전자공학과)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.32, no.10C, 2007 , pp. 1025-1031 More about this Journal
Abstract
This paper proposes an area-efficient pipeline FFT processor for MIMO-OFDM systems with four transmitting and four receiving antennas. Since the MIMO-OFDM system transmits multiple data streams, the complexity for the MIMO-OFDM system with a single-channel FFT processor increases linearly with the increase of the number of transmit channels. The proposed FFT processor is based on multi-channel structure, and therefore it can efficiently support multiple data streams. With the mixed radix algorithm, the number of non-trivial multiplications of the proposed FFT processor is decreased. The proposed FFT processor is synthesized with CMOS $0.18{\mu}m$ process and reduces the logic gates by 25% over a 4-channel Radix-4 multi-path delay commutator (R4MDC) FFT processor. Since the MIMO-OFDM FFT processor is one of the largest modules in the systems, the proposed FFT processor will be a vast contribution improvement to the low complexity design of MIMO-OFDM systems.
Keywords
FFT; MIMO-OFOM; MRMDC; Pipelined;
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