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An FPGA Implementation of an MML-DFE for Spatially Multiplexed MIMO Systems  

Im, Tae-Ho (중앙대학교 전자전기공학부 디지털통신연구실)
Lee, Kyu-In (중앙대학교 전자전기공학부 디지털통신연구실)
Park, Chang-Hwan (중앙대학교 전자전기공학부 디지털통신연구실)
Jeong, Ki-Cheol (중앙대학교 전자전기공학부 디지털통신연구실)
Yu, Sung-Wook (중앙대학교 전자전기공학부 디지털통신연구실)
Kim, Jae-Kwon (연세대학교 원주캠퍼스 컴퓨터정보통신공학부)
Cho, Yong-Soo (중앙대학교 전자전기공학부 디지털통신연구실)
Abstract
The ML-DFE(Maximum Likelihood-Decision Feedback Equalization) can be viewed as either a suboptimal signal detection method for reducing hardware complexity of ML or an enhanced detection method for reducing the effect of error propagation of SIC(Successive Interference Cancellation) in spatially multiplexed MIMO systems such as V-BLAST. The ML-DFE can achieve a higher diversity in rich scattering environments as well as reducing the error propagation effect by combing ML decoding with the DFE. In this paper, an MML-DFE(Modified Maximum Likelihood-Decision Feedback Equalization) is proposed to reduce the hardware complexity of the ML-DFE, without compromising performance. It is shown by FPGA implementation that the proposed MML-DFE can achieve the same performance as the ML-DFE with significantly reduced hardware complexity.
Keywords
MIMO Detection; ML-DFE; MML-DFE; FPGA;
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