Browse > Article

Complexity Analysis of a VHDL Implementation of the Bit-Serial Reed-Solomon Encoder  

Back Seung hun (세종대학교 정보통신공학과 신호처리연구실)
Song Iick ho (한국과학기술원 전자전산학과 전기및전자공학)
Bae Jin soo (세종대학교 정보통신공학과 신호처리연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.30, no.3C, 2005 , pp. 64-68 More about this Journal
Abstract
Reed-Solomon code is one of the most versatile channel codes. The encoder can be implemented with two famous structures: ordinary and bit-serial. The ordinary encoder is generally known to be complex and fast, while the bit-serial encoder is simple and not so fast. However, it may not be true for a longer codeword length at least in VHDL implementation. In this letter, it is shown that, when the encoder is implemented with VHDL, the number of logic gates of the bit-serial encoder might be larger than that of the ordinary encoder if the dual basis conversion table has to be used. It is also shown that the encoding speeds of the two VHDL implemented encoders are exactly same.
Keywords
Reed-Solomon code; VHDL; bit-serial; Berlekamp;
Citations & Related Records
연도 인용수 순위
  • Reference
1 R. Lidl, Finite Field, Addison Wesley, 1983
2 S. Lin and D.J. Costello, Error Control Coding, 2nd Ed., Prentice-Hall, 2002
3 I.S. Hus, T.K. Truong, L.J. Deutsch, and I.S. Reed, 'A comparison of VLSI architecture of finite field multipliers using dual, normal, or standard bases', IEEE Trans. Comput., vol. 37, no. 6, pp. 735-739, Jun. 1988   DOI   ScienceOn
4 I.S. Reed and G. Solomon, 'Polynomial codes over certain finite field', J. Soc. Ind. Applied Math., Vol.8, pp. 300-304, 1960   DOI   ScienceOn
5 E. Berlekamp, 'Bit-serial Reed-Solomon encoders', IEEE Trans. Inf. Theory, vol. 28, no. 6, pp. 869-874, Nov. 1982   DOI   ScienceOn
6 S. Bernard, Digital Communications, Prentice-Hall, 2001
7 R.E. Blahut, Algebraic Codes for Data Transmission, Cambridge University Press, 2003.
8 이만영, BCH 부호와 Reed-Solomon 부호, 민음사, 1990