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http://dx.doi.org/10.5573/JSTS.2017.17.3.347

STT-MRAM Read-circuit with Improved Offset Cancellation  

Lee, Dong-Gi (Dept. of Electronics and Computer Engineering, Hanyang University)
Park, Sang-Gyu (Dept. of Electronics and Computer Engineering, Hanyang University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.17, no.3, 2017 , pp. 347-353 More about this Journal
Abstract
We present a STT-MRAM read-circuit which mitigates the performance degradation caused by offsets from device mismatches. In the circuit, a single current source supplies read-current to both the data and the reference cells sequentially eliminating potential mismatches. Furthermore, an offset-free pre-amplification using a capacitor storing the mismatch information is employed to lessen the effect of the comparator offset. The proposed circuit was implemented using a 130-nm CMOS technology and Monte Carlo simulations of the circuit demonstrate its effectiveness in suppressing the effect of device mismatch.
Keywords
STT-MRAM; read-circuit; offset cancellation; sensing margin;
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Times Cited By KSCI : 3  (Citation Analysis)
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