1 |
R.E.Best, Phase-locked loops: Design, Simulation and Applications, 4/e McGraw-Hill: New York, US, 1999.
|
2 |
S.Soliman, F.Yuan and K.Raahemifar, "An overview of design techniques for CMOS phase detectors," IEEE Int Sym Circuits and Systems, May 2002 Pages:V-457 - V-460.
|
3 |
T.Johnson, A.Fard and D.Aberg, "An Improved Low Voltage Phase-Frequency Detector with Extended Frequency Capability", Proc IEEE Midwest Symposium on Circuits and Systems, 2004.
|
4 |
G.B.Lee, P.K.Chan and L.Siek, "A CMOS Phase Frequency Detector for Charge Pump Phase-Locked Loop", Proc IEEE Midwest Symp on Circuits and Systems, 1999.
|
5 |
S.Li and M.Ismail, "A High-Performance Dynamic_logic Phase- Frequency Detector", Chapter 28, C. Toumazou, G. Moschytz and B. Gilbert, Trade-offs in analog circuit design: the designer's companion, Kluwer Academic Publishers, 2002.
|
6 |
Cheng Zhang, and Marek Syrzycki, "Modifications of a Dynamic-Logic Phase Frequency Detector for Extended Detection Range" 53rd IEEE Int Midwest Symposium on Circuits and Systems, Aug. 2010, Pages 105 - 108.
|
7 |
J.M.Rabaey, A.Chandrakasan and B.Nikolic, Digital integrated circuits 2/e: a design perspective, Pearson Education, New Jersey, 2003.
|