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http://dx.doi.org/10.5573/JSTS.2012.12.3.353

Improved Charge Pump with Reduced Reverse Current  

Gwak, Ki-Uk (Department of Electrical Engineering, KAIST)
Lee, Sang-Gug (Department of Electrical Engineering, KAIST)
Ryu, Seung-Tak (Department of Electrical Engineering, KAIST)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.12, no.3, 2012 , pp. 353-359 More about this Journal
Abstract
A highly efficient charge pump that minimizes the reverse charge sharing current (in short, reverse current) is proposed. The charge pump employs auxiliary capacitors and diode-connected MOSFET along with an early clock to drive the charge transfer switches; this new method provides better isolation between stages. As a result, the amount of reverse current is reduced greatly and the clock driver can be designed with reduced transition slope. As a proof of the concept, a 1.1V-to-9.8 V charge pump was designed in a $0.35{\mu}m$ 18 V CMOS technology. The proposed architecture shows 1.6 V ~ 3.5 V higher output voltage compared with the previously reported architecture.
Keywords
Charge pump; Reverse current; DC-DC converter; MEMS microphone;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
Times Cited By SCOPUS : 0
연도 인용수 순위
1 Takanori Yamazoe, Hisanobu Ishida, and Yasutaka Nihongi, "A Charge Pump that Generates Positive and Negative High Voltages with Low Power- Supply Voltage and Low Power Consumption for Non-volatile Memories," Circuits and Systems, IEEE International Symposium on, pp.988-991, 2009.
2 Yi-Hsin Weng, Hui-Wen Tsai, and Ming-Dou Ker, "Design of Charge Pump Circuit in Low-Voltage CMOS Process with Suppressed Return-Back Leakage Current," IC Design and Technology, IEEE International Conference on, pp.155-158, 2010.
3 Du-Hwi Kim, Ji-Hye Jang, Liyan Jin, Pan-Bong Ha, and Young-Hee Kim, "Design of an EEPROM for a MCU with the Wide Voltage Range," Semiconductor Technology and Science, Journal of, Vol.10, No.4, pp.316-324, Dec., 2010.   DOI   ScienceOn
4 John F. Dickson, "On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an Improved Voltage Multiplier Technique," Solid-State Circuits, IEEE Journal of, Vol.11, No.3, pp. 374-378, Jun., 1976.   DOI
5 Kyeong-Pil Kang and Kyeong-Sik Min, "Charge Pump Circuits with Low Area and High Power Efficiency for Memory Applications," Semiconductor Technology and Science, Journal of, Vol.6, No.4, pp.257-263, Dec., 2006.
6 Jieh-Tsorng Wu and Kuen-Long Chang, "MOS Charge Pumps for Low-Voltage Operation," Solid-State Circuits, IEEE Journal of, Vol.33, No.3, pp.592-597, Apr., 1998.   DOI   ScienceOn
7 Roberto Pelliconi, et al., "Power Efficient Charge Pump in Deep Submicron Standard CMOS Technology," Solid-State Circuits, IEEE Journal of, Vol.38, No.6, pp.1068-1071, Jun., 2003.   DOI   ScienceOn
8 Ming-Dou ker, Shih-Lun Chen, and Chia-Shen Tsai, "Design of Charge Pump Circuit with Consideration of Gate-Oxide Reliability in Low-Voltage CMOS Processes," Solid-State Circuits, IEEE Journal of, Vol.41, No.5, pp.1100-1107, May, 2006.   DOI   ScienceOn