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http://dx.doi.org/10.5573/JSTS.2012.12.1.107

Bandwidth-Related Optimization in High-Speed Frequency Dividers using SiGe Technology  

Nan, Chao-Zhou (Dep. EE., Zhejiang University)
Yu, Xiao-Peng (Dep. EE., Zhejiang University)
Lim, Wei-Meng (Nanyang Technology University)
Hu, Bo-Yu (Dep. EE., Zhejiang University)
Lu, Zheng-Hao (Nanyang Technology University)
Liu, Yang (School of Microelectronics, University of Electronic Science and Technology)
Yeo, Kiat-Seng (Dep. EE., Zhejiang University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.12, no.1, 2012 , pp. 107-116 More about this Journal
Abstract
In this paper, the trade-off related to bandwidth of high-speed common-mode logic frequency divider is analyzed in detail. A method to optimize the operating frequency, band-width as well as power consumption is proposed. This method is based on bipolar device characteristics, whereby a negative resistance model can be used to estimate the optimal normalized upper frequency and lower frequency of frequency dividers under different conditions, which is conventionally ignored in literatures. This method provides a simple but efficient procedure in designing high performance frequency dividers for different applications. To verify the proposed method, a static divide-by-2 at millimeter wave ranges is implemented in 180 nm SiGe technology. Measurement results of the divider demonstrate significant improvement in the figure of merit as compared with literatures.
Keywords
Frequency divider; simplified models; bandwidth and power optimization; transistor area selection; design flow;
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