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http://dx.doi.org/10.5573/JSTS.2009.9.2.110

2D Transconductance to Drain Current Ratio Modeling of Dual Material Surrounding Gate Nanoscale SOl MOSFETs  

Balamurugan, N.B. (Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University)
Sankaranarayanan, K. (Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University)
John, M.Fathima (Department of Electronics and Communication Engineering, Thiagarajar College of Engineering, Anna University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.9, no.2, 2009 , pp. 110-116 More about this Journal
Abstract
The prominent advantages of Dual Material Surrounding Gate (DMSG) MOSFETs are higher speed, higher current drive, lower power consumption, enhanced short channel immunity and increased packing density, thus promising new opportunities for scaling and advanced design. In this Paper, we present Transconductance-to-drain current ratio and electric field distribution model for dual material surrounding gate (DMSGTs) MOSFETs. Transconductance-to-drain current ratio is a better criterion to access the performance of a device than the transconductance. This proposed model offers the basic designing guidance for dual material surrounding gate MOSFETs.
Keywords
Silicon-on-insulator (SOl) technology; dual material surrounding gate (DMSGT) MOSFETs; surrounding gate (SGT) MOSFETs; transconductance-to-drain current ratio ($g_{m}$/$I_{ds}$); short channel effects (SCEs); drain-induced barrier lowering (DIBL);
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Times Cited By KSCI : 2  (Citation Analysis)
Times Cited By SCOPUS : 0
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