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http://dx.doi.org/10.5573/JSTS.2008.8.1.027

Nonvolatile Memory Characteristics of Double-Stacked Si Nanocluster Floating Gate Transistor  

Kim, Eun-Kyeom (Department of Nano Engineering, University of Seoul)
Kim, Kyong-Min (Department of Nano Engineering, University of Seoul)
Son, Dae-Ho (Department of Nano Science & Technology, University of Seoul)
Kim, Jeong-Ho (Department of Nano Science & Technology, University of Seoul)
Lee, Kyung-Su (Department of Nano Science & Technology, University of Seoul)
Won, Sung-Hwan (Department of Nano Science & Technology, University of Seoul)
Sok, Jung-Hyun (Department of Nano Science & Technology, University of Seoul)
Hong, Wan-Shick (Department of Nano Science & Technology, University of Seoul)
Park, Kyoung-Wan (Department of Nano Science & Technology, University of Seoul)
Publication Information
Abstract
We have studied nonvolatile memory properties of MOSFETs with double-stacked Si nanoclusters in the oxide-gate stacks. We formed Si nanoclusters of a uniform size distribution on a 5 nm-thick tunneling oxide layer, followed by a 10 nm-thick intermediate oxide and a second layer of Si nanoclusters by using LPCVD system. We then investigated the memory characteristics of the MOSFET and observed that the charge retention time of a double-stacked Si nanocluster MOSFET was longer than that of a single-layer device. We also found that the double-stacked Si nanocluster MOSFET is suitable for use as a dual-bit memory.
Keywords
Double-stacked Si nanocluster; LPCVD; dual-bit memory; floating gate nonvolatile memory;
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