Browse > Article
http://dx.doi.org/10.1007/s43236-021-00303-y

Simplified logical modulator for the reduction of common mode voltage in alternating current drives  

Kullan, Murugesan (Department of Electrical and Electronics Engineering, Sri Sivasubramaniya Nadar College of Engineering)
Mahadevan, Senthil Kumaran (Department of Electrical and Electronics Engineering, Sri Sivasubramaniya Nadar College of Engineering)
Johnson, Anitha Roseline (Department of Electrical and Electronics Engineering, Sri Sivasubramaniya Nadar College of Engineering)
Publication Information
Journal of Power Electronics / v.21, no.11, 2021 , pp. 1680-1689 More about this Journal
Abstract
This paper proposes the reduction of common mode voltage (CMV) magnitude using a simplified logical modulator (SLM). This modulator uses the ideas of space vectors to detect and eliminate the high common mode vectors produced by carrier phase-shifted sine pulse width modulation generator. The proposed SLM has an inherent ability to eliminate the CMV spikes due to dead time, but it introduces short circuit vectors (SCVs). This issue is addressed by designing an SCV eliminator (SCVE). The performance of the SLM-SCVE is validated through simulations. The proposed SLM-SCVE is implemented using MATLAB-Xilinx system generator interface in Spartan 3E-FPGA and tested in a prototype hardware. The proposed SLM-SCVE proves to be a simple and reliable solution for the reduction of CMV in industrial application because finite number of logic gates is used.
Keywords
Common mode voltage; Dead time; MATLAB; SPWM; System generator; THD;
Citations & Related Records
Times Cited By KSCI : 4  (Citation Analysis)
연도 인용수 순위
1 Hava, A.M., Un, E.: A high-performance PWM algorithm for common-mode voltage reduction in three-phase voltage source inverters. IEEE Trans. Power Electron. 26(7), 1998-2008 (2011)   DOI
2 Mohan, M., Renge, H., Suryawanshi, M.: Multilevel inverter to reduce common mode voltage in AC motor drives using SPWM technique. J. Power Electron. 11(1), 21-27 (2011)   DOI
3 Duong, T.D., Nguyen, M.K., Tran, T.T., Lim, Y.C., Choi, J.H., Wang, C.: Modulation techniques for a modified three-phase quasi-switched boost inverter with common-mode voltage reduction. IEEE Access. 8(1), 160670-160683 (2020)   DOI
4 Julian, A.L., Oriti, G., Lipo, T.A.: Elimination of common-mode voltage in three-phase sinusoidal power converters. IEEE Trans. Power Electron. 14(5), 982-989 (1999)   DOI
5 Nguyen, T., Nguyen, N.-V.: An efficient four-state zero common-mode voltage PWM scheme with reduced current distortion for a three-level inverter. IEEE Trans. Ind. Electron. 65(2), 1021-1030 (2018)   DOI
6 Erdman, J.M., Kerkman, R.J., Schlegel, D.W., Skibinski, G.L.: Effect of PWM inverters on AC motor bearing currents and shaft voltages. IEEE Trans. Ind. Appl. 32(2), 250-259 (1996)   DOI
7 Muetze, A., Binder, A.: Calculation of circulating bearing currents in machines of inverter-based drive systems. IEEE Trans. Ind. Electron. 54(2), 932-938 (2007)   DOI
8 Hava, A., Un, E.: Performance analysis of reduced common-mode voltage PWM methods and comparison with standard PWM methods for three-phase voltage-source inverters. IEEE Trans. Power Electron. 24(1), 241-252 (2009)   DOI
9 Kimball, J.W., Zawodniok, M.: Reducing common-mode voltage in three-phase sine-triangle PWM with interleaved carriers. IEEE Trans. Power Electron. 26(8), 2229-2236 (2011)   DOI
10 Xiang, W., Guojun, T., Zongbin, Y., Yi, L., Shizhou, X.: Optimized common-mode voltage reduction PWM for three phase voltage-source inverter. IEEE Trans. Power Electron. 31(4), 5019-5035 (2016)
11 Qin, C., Li, X., Xing, X., Zhang, C., Zhang, G.: Common-mode voltage reduction method for three-level inverter with unbalanced neutral-point voltage conditions. Trans. Ind. Inform. 5, 10 (2020). https://doi.org/10.1109/TII.2020.3048533
12 Lai, Y.S., Shyu, F.S.: Optimal common-mode voltage reduction PWM technique for inverter control with consideration of the dead-time effect-part I: basic development. IEEE Trans. Ind. Appl. 40(6), 1605-1612 (2004)   DOI
13 Jin, H., Shi, H.X.: Reducing the common-mode voltage through carrier peak position modulation in an SPWM three-phase inverter. IEEE Trans. Power Electron. 29(9), 4490-4495 (2014)   DOI
14 Tian, K., Wang, J., Wu, B., Xu, D., Cheng, Z., Zargari, N.R.: A virtual space vector modulation technique for the reduction of common-mode voltage in both magnitude and third order components. IEEE Trans. Power Electron. 31(1), 839-848 (2016)   DOI
15 Liu, F., Zhao, Z., Lu, T., Wei, S., Li, K.: A combined PWM algorithm to eliminate spikes of common mode voltages. In: Proc. IEEE Conf. Expo. Transp. Electr. Asia-Pac., pp. 1-6 (2014)
16 Zhou, J., Wei, C., Yang, Y., Chen, Y., Zhang, Y.: Inverter simplified algorithm of PWM and inhibit common mode voltage strategy. Trans. China Electrotech. Soc. 29(8), 158-165 (2014)
17 Tallam, R.M., Kerkman, R.J., Leggate, D., Lukaszewski, R.A.: Common-mode voltage reduction PWM algorithm for AC drives. IEEE Trans. Ind. Appl. 46(5), 1959-1969 (2010)   DOI
18 Shi, J., Li, S.: Analysis and compensation control of dead-time effect on space vector PWM. J. Power Electron. 15(2), 431-442 (2015)   DOI
19 Hassan, M.S., Ahmed, A., Masahito, S., Imaoka, J., Gamal, M.D.: Three-phase split-source inverter-fed PV systems: analysis and mitigation of common-mode voltage. IEEE Trans. Power Electron. 35(9), 9824-9838 (2020)   DOI
20 Morris, C.T., Han, D., Sarlioglu, B.: Reduction of common mode voltage and conducted EMI through three-phase inverter topology. IEEE Trans. Power Electron. 32(3), 1720-1724 (2017)   DOI
21 Amit, O., Pradyumn, C., Arvind, M., Shailendra, J.: Carrier based common mode voltage reduction techniques in neutral point clamped inverter based AC-DC-AC drive system. J Power Electron. 16(1), 142-152 (2016)   DOI
22 Nguyen, T.D., Phan, D.Q., Dao, D.N., Lee, H.-H.: Carrier phase-shift PWM to reduce common-mode voltage for three-level T-type NPC inverters. J. Power Electron. 14(6), 1197-1207 (2014)   DOI
23 Sang-Won, Y., Jae-Hyuk, B., Dong-Sik, K., Ji-Yoon, Y.: A new active zero state PWM algorithm for reducing the number of switchings. J. Power Electron. 17(1), 88-95 (2017)   DOI
24 Guojun, T., Xiang, W., Zhichuan, W., Zongbin, Y.: A generalized algorithm to eliminate spikes of common-mode voltages for CMVRPWM. IEEE Trans. Power Electron. 31(9), 6698-6709 (2016)   DOI
25 Pham, K., Nguyen, N.V.: Pulse-width modulation strategy for common mode voltage elimination with reduced common mode voltage spikes in multilevel inverters with extension to over-modulation mode. J. Power Electron. 19(10), 727-743 (2019)
26 Un, E., Hava, A.M.: A near-state PWM method with reduced switching losses and reduced common mode voltage for three-phase voltage source inverters. IEEE Trans. Ind. Appl. 45(2), 782-793 (2009)   DOI
27 Anitha, R.J., Senthil Kumaran, M., Rajini, V., Vijayenthiran, S.: An unified algorithm for multilevel inverters. IET Power Electron. 10(7), 808-816 (2017)   DOI
28 Ze, L., Yuanbo, G., Jinhui, X., Yuhang, D., Xiaohua, Z.: Modified synchronized SVPWM strategies to reduce CMV for three-phase VSIs at low switching frequency. IEEE Trans. Ind. Appl. 56(5), 5245-5256 (2020)   DOI
29 Sharifzadeh, M., Babaie, M., Chouinard, G., Al-Haddad, K.: Hybrid SHM-PWM for common mode voltage reduction in three-phase three-level NPC inverter. IEEE J. Emerg. Sel. Top. Power Electron. 1(1), 99 (2020)
30 Seung-Jun, C., Sanggi, K., Hyeon-Sik, K., Seung-Ki, S.: Common-mode voltage reduction of three level four leg PWM converter. Trans. Korean Inst. Power Electron. 19(6), 488-493 (2014)   DOI
31 Hoseini, S.K., Adabi, J., Sheikholeslami, A.: Predictive modulation schemes to reduce the common mode voltage for three-phase voltage source inverters". IEEE Trans. Power Electron. 30(9), 5019-5035 (2015)   DOI