1 |
K. De Gusseme, D. M. Van de Sype, A. P. M. Van den Bossche, and J. A. Melkbeek, "Input current distortion of CCM boost PFC converters operated in DCM," IEEE Trans. Ind. Electron., Vol. 54, No. 2, pp. 858-865, Apr. 2007.
DOI
ScienceOn
|
2 |
IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power System, IEEE Std 519-1992, 1992.
|
3 |
J. S. Lai and D. Chen, "Design consideration for power factor correction boost converter operating at the boundary of continuous conduction mode and discontinuous conduction mode," in Proc. IEEE Appl. Power Electron. Conf. (APEC), pp. 267-273, 1993.
|
4 |
L. Huber, Brian T. Irving, and M. Jovanovic, "Line current distortions of DCM/CCM boundary boost PFC converter," in Proc. IEEE Appl. Power Electron. Conf. (APEC), pp. 702-708, 2008.
|
5 |
L. Huber, B. T. Irving, and M. Jovanovic, "Effect of valley switching and switching-frequency limitation on line-current distortions of DCM/CCM boundary boost PFC converters," IEEE Trans. Power Electron., Vol. 24, No. 2, pp. 339-347, Feb. 2009.
DOI
|
6 |
J. W. Kim, S. M. Choi, and K. T. Kim, "Variable on-time control of the critical conduction mode boost power factor correction converter to improve zero-crossing distortion," in Proc. IEEE Power Electron. Drive Syst. Conf., pp. 1542-1546, Nov. 2005.
|
7 |
Boundary Mode PFC Controller, Fairchild Semiconductor Co., FAN6961 Datasheet, Rev. 1.0.3, 2009.
|
8 |
Critical Conduction Mode PFC Controller Utilizing a Transconductance Error Amplifier, ON Semiconductor, NCP1608 Datasheet, Rev. 3, Jun. 2010.
|
9 |
J. W. Kim and D. H. Kim, "Power factor correction circuit," U.S. Patent 7,538,525, May 26, 2009.
|
10 |
FA5601 Application Note, Fuji Electric Co., Ltd., AN-066E, Rev.0.3, Apr. 2011.
|
11 |
A. A. Nostwick and B. L. Hesterman, "Power factor correction circuit," U.S. Patent 5 614 810, Mar. 25, 1997.
|
12 |
C. Y. Bernd and R. Liang, "Power factor correction with reduced total harmonic distortion," U.S. Patent 6 128 205, Oct. 3, 2000.
|
13 |
J. H. Lee, "Power factor correction circuit for reducing distortion of input current," U.S. Patent 8,320,144, Nov. 27, 2012.
|
14 |
J.-C. Tsai, C.-L. Chen, Y.-T. Chen, C.-L. Ni, C.-Y. Chen, and K.-H. Chen, "Perturbation on-time (POT) technique in power factor correction (PFC) controller for low total harmonic distortion and high power factor," IEEE Trans. Power Electron., Vol. 28, No. 1, pp. 199-212, Jan. 2013.
DOI
|
15 |
S.-H. Tang, D. Chen, C.-S Huang, C.-Y. Liu, and K. H. Liu, "A new on-time adjustment scheme for the reduction of input current distortion of critical-mode power factor correction boost converters," in Proc. IEEE International Power Electron. Conf. (IPEC), pp. 1717-1724, 2010.
|
16 |
M. Marvi and A. F-Ahmady, "A fully ZVS critical conduction mode boost PFC," IEEE Trans. Power Electron., pp. 1958-1965, Apr. 2012.
|