[KSCI] Korea Science Citation Index Service

http://dx.doi.org/10.3837/tiis.2020.02.014

IP Design of Corrected Block TEA Cipher with Variable-Length Message for Smart IoT

Yeo, Hyeopgoo (Division of Information & Telecommunications, Hanshin University)
Sonh, Seungil (Division of Information & Telecommunications, Hanshin University)
Kang, Mingoo (Dept. of IT Contents, Hanshin University)

Publication Information

KSII Transactions on Internet and Information Systems (TIIS) / v.14, no.2, 2020 , pp. 724-737 More about this Journal

Abstract

Corrected Block TEA(or XXTEA) is a block cipher designed to correct security weakness in the original block TEA in 1998. In this paper, XXTEA cipher hardware which can encrypt or decrypt between 64-bit and 256-bit messages using 128-bit master key is implemented. Minimum message block size is 64-bit wide and maximal message block size is 256-bit wide. The designed XXTEA can encrypt and decrypt variable-length message blocks which are some arbitrary multiple of 32 bits in message block sizes. XXTEA core of this paper is described using Verilog-HDL and downloaded on Vertex4. The operation frequency is 177MHz. The maximum throughput for 64-bit message blocks is 174Mbps and that of 256-bit message blocks is 467Mbps. The cryptographic IP of this paper is applicable as security module of the mobile areas such as smart card, internet banking, e-commerce and IoT.

Keywords

Corrected Block TEA(XXTEA); Symmetric Block Cipher; Encryption; Decryption;

Citations & Related Records

Reference

1	Satish K. Vishwakarma and Shivam Khare, "XXTEA An Optimized Encryption Design with High Feedback Substitution Box Architecture," International Journal of Modern Engineering & Management Research, Vol.2, Issue 3, pp.12-16, Sep. 2014.
2	Issam Damaj, Samer Hamade, and Hassan Diab, "Efficient Tiny Hardware Cipher under Verilog," in Proc. of the 2008 High Performance Computing & Simulation Conference, 2008.
3	Mi-Ji Sung, Kyung-Wook Shin, "An Efficient Hardware Implementation of Lightweight Block Cipher LEA-128/192/256 for IoT Security Applications," JKIICE, Vol.19, No. 7, pp.1608-1616, Jul. 2015.
4	Shweta Gaba, Iti Aggarwal, and Sujata Pandey, "Design of Efficient XTEA Using Verilog," International Journal of Scientific and Research Publications, Vol. 2, Issue 6, pp.1-5, June 2012.
5	Seungil Sonh, Byeongyoon Choi, Mingoo Kang, "Technology Trend of Cipher Chips," KSII, Vol.1, No.2, pp.1491-1500, Oct. 2001..
6	J. Kelsey et al., "Related-key Cryptanalysis of 3-way, Biham-DES, cast, DES-XNew DES, RC2, and TEA," in Proc. of 1st International Conference on Information and Communication Security, pp.233-246, 1997.
7	David J. Wheeler and Roger M. Needham, "Correction to XTEA," http://www.movable-type.co.uk/scripts/xxtea.pdf, Oct. 1998.
8	Ion Sima, et al., "XXTEA, an Alternative Replacement of KASUMI Cipher Algorithm in A5/3 GSM, F8, F8 UMTS Data Security Functions," in Proc. of 9th International Conference on Communications(IEEE), pp.323-326, 2012.
9	Elias Yarrokov, "Cryptanalysis of XXTEA," International Association for Cryptologic Research, pp.1-6, May 2010.
10	http://read.pudn.com/downloads187/ sourcecode/windows/other/877059/xxtea.cpp__.htm
11	Seungil Sonh, "Design of Encryption/Decryption Core for Block Cipher HIGHT," JKIICE, vol. 16, no. 4, pp. 778-784, Apr. 2012.
12	Seungil Sonh, Hyeopgoo Yeo, "A Design of XXTEA for Variable-Length Message Block Cipher," in Proc. of APIC-IST 2019, pp. 115-116, Jun. 2019.
13	Tutorial: Xilinx ISE 14.4 and Digilent Nexys 3.
14	Hoang Nguyen, "Xilinx ISE Simulator Tutorial V14.4," pp. 1-38, Jun. 2015.
15	Joohong Kim, "Hardware Design and Performance Evaluation of a Lightweight Cryptographic Algorithm for RFID/USN," NDSL,. 2006.