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http://dx.doi.org/10.3837/tiis.2015.08.021

Single-Phase Energy Metering Chip with Built-in Calibration Function  

Lee, Youn-Sung (School of Electrical and Electronic Engineering, Yonsei University)
Seo, Jeongwook (Department of Information and Communication Engineering, Namseoul University)
Wee, Jungwook (Korea Electronics Technology Institute)
Kang, Mingoo (Department of Information and Telecommunications, Hanshin University)
Kim, Dong Ku (School of Electrical and Electronic Engineering, Yonsei University)
Publication Information
KSII Transactions on Internet and Information Systems (TIIS) / v.9, no.8, 2015 , pp. 3103-3120 More about this Journal
Abstract
This paper presents a single-phase energy metering chip with built-in calibration function to measure electric power quantities. The entire chip consists of an analog front end, a filter block, a computation engine, a calibration engine, and an external interface block. The key design issues are how to reduce the implementation costs of the computation engine from repeatedly used arithmetic operations and how to simplify calibration procedure and reduce calibration time. The proposed energy metering chip simplifies the computation engine using time-division multiplexed arithmetic units. It also provides a simple and fast calibration scheme by using integrated digital calibration functionality. The chip is fabricated with 0.18-μm six-layer metal CMOS process and housed in a 32-pin quad-flat no-leads (QFN) package. It operates at a clock speed of 4096 kHz and consumes 9.84 mW in 3.3 V supply.
Keywords
energy meter; analog front end; computation engine; calibration; SoC;
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1 Y. Li and W. Chu, “A New Non-Restoring Square Root Algorithm and Its VLSI Implementations,” IEEE International Conference on Computer Design, pp. 538-544, 1996. Article (CrossRef Link)
2 Y. Li and W. Chu, “Implementation of Single Precision Floating Point Square Root on FPGAs,” Proc. of the IEEE Symposium on FCCM, pp. 226-232, 1997. Article (CrossRef Link)
3 M. A. Al-Alaoui, “Novel digital integrator and differentiator,” Electron. Lett., vol. 29, no. 4, pp. 376-378, 1993. Article (CrossRef Link)   DOI
4 J. L. Bihan, “Novel class of digital integrators and differentiators,” Electron. Lett., vol. 29, no. 11, pp. 971-973, 1993. Article (CrossRef Link)   DOI
5 J. E. Volder, “The CORDIC trigonometric computing technique,” IRE Trans. Electronic Computers, vol. EC-8, no. 3, pp. 330-334, 1959. Article (CrossRef Link)   DOI
6 Y. H. Hu, “CORDIC-based VLSI Architectures for Digital Signal Processing,” IEEE Signal Processing Magazine, pp. 16-35, 1992. Article (CrossRef Link)   DOI
7 Z. Fan, P. Kulkarni, S. Gormus, C. Efthymiou, G. Kalogridis, M. Sooriyabandara, Z. Zhu, S. Lambotharan, and W. H. Chin, “Smart grid communications: Overview of research challenges, solutions, and standardization activities,” IEEE Commun. Surveys Tuts., vol. 15, no. 1, pp. 21-38, 2013. Article (CrossRef Link)   DOI
8 X. Jiang, S. Dawson-Haggerty, P. Dutta, and D. Culler, “Design and Implementation of a High-Fidelity AC Metering Network,” Information Processing in Sensor Networks, pp.253-264, April 2009. Article (CrossRef Link)
9 W. Koon, "Current sensing for energy metering," in Proc. of IIC-China Conference, pp. 321-324, 2002. Article (CrossRef Link)
10 IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, sinusoidal, Balanced, or Unbalanced Conditions, IEEE Std 1459-2010, 2010. Article (CrossRef Link)
11 E. B. Hogenauer, “An Economical Class of Digital Filters for Decimation and Interpolation,” IEEE Trans. Acoust., Speech, Signal Processing, vol. 29, no. 2, pp. 155-162, 1981. Article (CrossRef Link)   DOI
12 M. Mottagphi-Deastjerdi, A. Afzali-Kusha, and M. Pedram, “A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture,” IEEE Tran. Very Large Scale Integr. (VLSI) Syst., vol. 17, no. 2, pp. 302-306, 2009. Article (CrossRef Link)   DOI
13 C. N. Marimuthu, D. P. Thangaraj, and A. Ramesan, “Low Power Shift and Add Multiplier Design,” Int’l J. Computer Science and Information Technology, vol. 2, pp. 12-22, 2010. Article (CrossRef Link)
14 M.D. Ercegovac and T. Lang, “Division and Square Root: Digit-Recurrence Algorithms and Implementations,” Boston: Kluwer Academic, 1994. Article (CrossRef Link)
15 S. F. Oberman and M. J. Flynn, "Division Algorithms and Implementations," IEEE Trans. Computers, vol. 46, no. 8, pp. 833-854, 1997. Article (CrossRef Link)   DOI