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http://dx.doi.org/10.3745/JIPS.2013.9.3.499

Hardware Software Co-Simulation of the Multiple Image Encryption Technique Using the Xilinx System Generator  

Panduranga, H.T. (Dept. of Studies in Electronics, University of Mysore, Hemagangothri PG Center-Hassan)
Naveen, Kumar S.K. (Dept. of Studies in Electronics, University of Mysore, Hemagangothri PG Center-Hassan)
Sharath, Kumar H.S. (Dept. of Studies in Electronics, University of Mysore, Hemagangothri PG Center-Hassan)
Publication Information
Journal of Information Processing Systems / v.9, no.3, 2013 , pp. 499-510 More about this Journal
Abstract
Hardware-Software co-simulation of a multiple image encryption technique shall be described in this paper. Our proposed multiple image encryption technique is based on the Latin Square Image Cipher (LSIC). First, a carrier image that is based on the Latin Square is generated by using 256-bits of length key. The XOR operation is applied between an input image and the Latin Square Image to generate an encrypted image. Then, the XOR operation is applied between the encrypted image and the second input image to encrypt the second image. This process is continues until the nth input image is encrypted. We achieved hardware co-simulation of the proposed multiple image encryption technique by using the Xilinx System Generator (XSG). This encryption technique is modeled using Simulink and XSG Block set and synthesized onto Virtex 2 pro FPGA device. We validated our proposed technique by using the hardware software co-simulation method.
Keywords
Image Encryption; Latin Square;
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