1 |
P. K. Tiwari, S. Kumar, S. Mittal, V. Srivastava, U. Pandey, and S. Jit, "A 2D analytical model of the channel potential and threshold voltage of double-gate (DG) MOSFETs with vertical Gaussian doping profile," Proceedings of International Multimedia, Signal Processing and Communication Technologies, Aligarh, India, pp. 52-55, 2009.
|
2 |
H. K. Jung, "Analysis of doping profile dependent threshold voltage for DGMOSFET using Gaussian function," International Journal of Maritime Information and Communication Sciences, vol. 9, no. 3, pp. 310-314, 2011.
|
3 |
W. Fulop, "Calculation of avalanche breakdown voltages of silicon p-n junctions," Solid-State Electronics, vol. 10, no. 1, pp. 39-43, 1967.
DOI
ScienceOn
|
4 |
D. S. Havaldar, G. Katti, N. DasGupta, and A. DasGupta, "Subthreshold current model of FinFETs based on analytical solution of 3-D Poisson's equation," IEEE Transactions on Electron Devices, vol. 53, no. 4, pp. 737-742, 2006.
DOI
ScienceOn
|
5 |
International Technology Roadmap for Semiconductors [Internet]. Available: http://public.itrs.net/.
|
6 |
E. G. Ioannidis, A. Tsormpatzoglou, D. H. Tassis, C. A. Dimitriadis, G. Ghibaudo, and J. Jomaah, "Effect of localized interface charge on the threshold voltage of short-channel undoped symmetrical doublegate MOSFETs," IEEE Transactions on Electron Devices, vol. 58, no. 2, pp. 433-440, 2011.
DOI
ScienceOn
|
7 |
X. X. Du, L. Sun, X. Y. Liu, and R. Q. Han, "A comparative study of double gate MOSFET with asymmetric barrier heights at source/drain and the symmetric DG-SBFET," International Workshop on Junction Technology, Kyoto, Japan, pp. 47-50, 2009.
|
8 |
Q. Chen, B. Agrawal, and J. D. Meindl, "A comprehensive analytical subthreshold swing(S) model for double-gate MOSFETs," IEEE Transactions on Electron Devices, vol. 49, no. 6, pp. 1086-1090, 2002.
DOI
ScienceOn
|
9 |
H. Mohammad, H. Abdullah, C. F. Dee, P. S. Menon, and B. Y. Majlis, "A new analytical model for lateral breakdown voltage of double-gate power MOSFETs," Proceedings of IEEE Regional Symposium on Micro and Nanoelectronics, Kota Kinabalu, Malaysia, pp. 92-95, 2011.
|