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http://dx.doi.org/10.5370/JEET.2014.9.2.655

Analytical Surface Potential Model with TCAD Simulation Verification for Evaluation of Surrounding Gate TFET  

Samuel, T.S. Arun (Dept. of Electronics and Communication Engineering, Thiagarajar College of Engineering)
Balamurugan, N.B. (Dept. of Electronics and Communication Engineering, Thiagarajar College of Engineering)
Niranjana, T. (Dept. of Electronics and Communication Engineering, Thiagarajar College of Engineering)
Samyuktha, B. (Dept. of Electronics and Communication Engineering, Thiagarajar College of Engineering)
Publication Information
Journal of Electrical Engineering and Technology / v.9, no.2, 2014 , pp. 655-661 More about this Journal
Abstract
In this paper, a new two dimensional (2D) analytical modeling and simulation for a surrounding gate tunnel field effect transistor (TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunneling generation rate and thus we numerically extract the tunneling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.
Keywords
Surrounding gate TFET; Surface potential; Electric field distribution;
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Times Cited By KSCI : 1  (Citation Analysis)
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