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Core Technology of Electronic Packaging  

Yoon Jeong-Won (성균관대학교 신소재공학과)
Moon Won-Chul (성균관대학교 마이크로 전자 및 반도체 패키징 기술개발 사업단)
Jung Seung-Boo (성균관대학교 마이크로 전자 및 반도체 패키징 기술개발 사업단)
Publication Information
Journal of Welding and Joining / v.23, no.2, 2005 , pp. 10-17 More about this Journal
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  • Reference
1 J.H. Lau : Low Cost Flip Chip Technologies, McGRAW HILL BOOK Co., 2001, 1-17, 27-90
2 전자부품연구원 전자정보센터 (web site:eic.re.kr)
3 K. Tanida, M. Umemoto, N. Tanaka, Y. Tomita, K. Applied Physics, 43. (2004),2264-2270
4 D.G. Kim, J.W. Kim, J.G. Lee, H. Mori, D.J. Quesnel, S.B. Jung : Solid state interfacial reation and joint strength of Sn-37Pb solder with Ni-P under bump metallization in flip chip application. Journal of Alloys and Compounds. (2005) (in press)   DOI   ScienceOn
5 web site: www.sip-c.com
6 web site: www.aset.or.jp
7 H. Ye, C. Basaran. D.C. Hopkins : Damage mechanics of microelectronics solder joints under high current densities, International Journal of Solids and Structures, 40, (2003), 4021-4032   DOI   ScienceOn
8 web site: http://nepp.nasa.gov/whisker
9 J. Kloeser. P. Coskina. R. Aschenbrener : Bump formation for flip chip and CSP by solder paste pringing, Microelectronics Reliability, 42, (2002), 391-398   DOI   ScienceOn
10 J.H. Lau : Solder Joint Reliability of BGA, CSP. Flip Chip. and Fine Pitch SMT Assemblies, McGRAW HILL BOOK Co., 1997, 1-9
11 web site: www.fpcb.com
12 3차원 실장기술 SiP의 기술동향, 전자부품연구원 전자정보센터 (web site:eic.re.kr)