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http://dx.doi.org/10.5573/ieie.2015.52.4.125

PCI Express Gen3 System Design using High-speed Signal Integrity Analysis  

Kwon, Wonok (ETRI)
Kim, Youngwoo (ETRI)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.52, no.4, 2015 , pp. 125-132 More about this Journal
Abstract
PCI Express is high-speed point-to-point serial protocol, the system is designed by analysing loss and jitter through Eye Diagram. It is necessarily analyzing high speed serial signals when the PCI Express Gen3 which has 8Gbps physical signal speed is designed especially. This paper deals with topology extraction, channel analysis, extraction of s-parameters and system signal integrity simulation within transceiver buffer models through PCI Express Gen3 server connecting switch system design. Optimal parameters of transmitter buffer equalizer are found through solution space simulation of de-emphasis and preshoot parameters to compensate channel loss.
Keywords
Signal Integrity; Eye diagram; PCI Express;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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