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K. Kim, G. S. Kim, S. K. Kim, K.-H. Baek, "A Multi-Lane MIPI CIS Receiver for Mobile Camera Applications," IEEE Transactions on Consumer Electronics, vol.56, 2010.
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H. Takauchi, H. Tamura, S. Matsubara, M. Kibune, Y. Doi, T. Chiba, H. Anbutsu, H. Yamaguchi, T. Mori, M. Takatsu, K. Gotoh, T. Sakai, T. Yamamura, "A CMOS multi-channel 10Gb/s Transceiver," IEEE Dig. Tech. Papers, ISSCC, pp.72-73, 2003.
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Yan-Bin Luo, Ping Chen, Qui-Ting Chen, Chih-Yong Wang, Chan-Hao Chang, Szu-Jui Fu, Chien-Ming Chen, Hung-Sung Li, "A 250Mb/s-to-3.4Gb/s HDMI Receiver with Adaptive Loop Updating Frequencies and an Adaptive Equalizer", IEEE International Solid-State Circuits Conference, pp. 190-191, Feb. 2009.
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Y. Liu, Ping-Hsuan Hsieh, Seongwon Kim, Jae-sun Seo, R. Montoye, L. Chang, J. Tierno, D. Friedman, "A 0.1pJ/b 5-10Gb/s Charge-Recycling Stacked Low-Power I/O for On-Chip Signaling in 45nm CMOS SOI," IEEE ISSCC Dig. Tech. Papers, Feb 2013, pp. 400, 401.
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Seok Kim, Youngkyun Jeong, Mira Lee, Kee-Won Kwon, Jung-Hoon Chun, "A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator", IEEE Transactions on Circuits and Systems I: Regular Papers vol. 61, Issue. 1
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Dongmyung Lee, Jungwon Han, Gunhee Han, Sung Min Park, "An 8.5-Gb/s Fully Integrated CMOS Optoelectronic Receiver Using Slope-Detection Adaptive Equalizer", IEEE Journal of Solid-State Circuits, vol. 45, pp. 2861-2873, Dec. 2010.
DOI
ScienceOn
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Mira Lee, Seok Kim, Youngkyun Jeong, Kee-won Kwon, Jung-Hoon Chun, "Low Power 4-Gb/s Receiver for GND-referenced Differential Signaling" Journal of the Institute of Electronics Engineers of Korea, Vol. 49. No. 9. pp. 244-250. 2012.
과학기술학회마을
DOI
ScienceOn
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H. Uchiki, Y. Ota, M. Tani, Y. Hayakawa, K. Asahina, "A 6Gb/s RX Equalizer Adapted Using Direct Measurement of the Equalizer Output Amplitude", IEEE International Solid-State Circuits Conference, pp. 104-599, Feb. 2008.
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K. Kaviani, A. Amirkhany, C. Huang, P. Le, C. Madden, K. Saito, K. Sano, V. Murugan, W. Beyene, K. Chang, and C. Yuan, " 0.4-mW/Gb/s, 16-Gb/s near-ground receiver front-end with replica transconductance termination calibration,"in IEEE ISSCC Dig. Tech. Papers, 2012, pp. 132-33.
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P. K. Hanumolu, M. G. Kim, G.-Y. Wei and U.-K. Moon, "A 1.6Gbps digital clock and data recovery circuit," in proc. IEEE CICC, 2006, pp. 603-606.
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Cheeranthodi, R., Madhavan, S., Shukla, U.K, Rangan, G.N., "Improvements to Negative-C Compensation Based Amplifiers for Broadband Applications," 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.
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J.-H. Lee, S.-H. Kim, J.-S Shin, D.-C. Choi, K.-W. Kwon, J.-H. Chun, "A Tracked Oversampling Digital Data Recovery for Low Latency, Fast Acquisition, and High Jitter Tolerance," in IEEE International Midwest Symposium on Circuits and Systems, 2013.
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