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http://dx.doi.org/10.5573/ieek.2013.50.4.065

Primitive IPs Design Based on a Memristor-CMOS Circuit Technology  

Han, Ca-Ram (College of Electrical and Computer Engineering, Chungbuk National University)
Lee, Sang-Jin (College of Electrical and Computer Engineering, Chungbuk National University)
Eshraghian, Kamran (College of Electrical and Computer Engineering, Chungbuk National University)
Cho, Kyoungrok (College of Electrical and Computer Engineering, Chungbuk National University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.50, no.4, 2013 , pp. 65-72 More about this Journal
Abstract
This paper presents design methodology for Memristor-CMOS circuits and its application to primitive IPs design. We proposed a Memristor model and designed basic elements, Memristor AND/OR gates. The primitive IPs based on a Memristor-CMOS technology is proposed for a Memristive system design. The netlists of IPs are extracted from the layouts of Memristor-CMOS and is verified with SPICE-like Memristor model under $0.18{\mu}m$ CMOS technology. As a result, an example design Memristor-CMOS full adder has only 47.6 % of silicon area compare to the CMOS full-adder.
Keywords
Memristor; Memristor-CMOS logic; Hybrid design; Primitive IP;
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