Design and Fabrication of An Improved Capacitor Multiplier with Good Frequency Characteristics
![]() |
Lee, Dae-Hwan
(Department of Semiconductor Engineering, Chungbuk National University)
Back, Ki-Ju (Department of Semiconductor Engineering, Chungbuk National University) Han, Da-In (Department of Semiconductor Engineering, Chungbuk National University) Ryu, Byoung-Son (Department of Semiconductor Engineering, Chungbuk National University) Kim, Yeong-Seuk (Department of Semiconductor Engineering, Chungbuk National University) |
1 | G. A. Rincon-Mora, "Active capacitor multiplier in miller-compensated circuits," IEEE Transactions On Solid-State Circuits, Vol. 35, No. 1, pp. 26-32, January 2000. DOI ScienceOn |
2 | S. Pennisi, "CMOS multiplier for grounded capacitors," Electronics Letters, Vol. 38, No. 15, pp. 765-766, July 2002. DOI ScienceOn |
3 | Y. Tang, M. Ismail and S. Bibyk, "Adaptive miller capacitor multiplier for compact on-chip PLL filter," Electronics Letters, Vol 39, No. 1, pp. 43-45, January 2003. DOI ScienceOn |
4 | K. Shu, E. Sanchez-Sinencio, J. Silva-Martinez and S. H. K. Embabi, "A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier," IEEE Journal of Solid-State Circuits, Vol. 38, No. 6, pp. 866-874, June 2003. DOI ScienceOn |
5 | I. -C. Hwang, "Area-efficient and self-biased capacitor multiplier for on-chip loop filter," Electronics Letters, Vol. 42, No. 24, pp. 1392-1393, November 2006. DOI ScienceOn |
6 | Ke-Horng Chen, Chia-jung Chang and Te-Hien Liu, "Bidirectional current-mode capacitor multipliers for on-chip compensation," IEEE Transations On Power Electronics, Vol. 23, No. 1, pp. 180-188, Jaunary 2008. DOI ScienceOn |
7 | 박승찬, 임동균, 윤광섭, "온칩된 커패시터 체배기법 적용 보상회로를 갖는 DC to DC 벅 변환기 설계," 전자공학회 하계종합학술대회, 제31권, 제1호, pp. 537-538, 2008년 6월 |
8 | 조대웅, 김석진, 박승천, 임동균, 장경운, 윤광섭, "저 전력 버퍼 회로를 이용한 무선 모바일용 스텝 다운 DC-DC 변환기," 전자공학회 논문지, 제45권, SD편, 제9호, pp. 841-847, 2008년 9월 |
![]() |