Browse > Article
http://dx.doi.org/10.5573/ieek.2013.50.4.117

Data Deduplication Method using PRAM Cache in SSD Storage System  

Kim, Ju-Kyeong (Department of Electronic Engineering, Inha University)
Lee, Seung-Kyu (Department of Electronic Engineering, Inha University)
Kim, Deok-Hwan (Department of Electronic Engineering, Inha University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.50, no.4, 2013 , pp. 117-123 More about this Journal
Abstract
In the recent cloud storage environment, the amount of SSD (Solid-State Drive) replacing with the traditional hard disk drive is increasing. Management of SSD for its space efficiency has become important since SSD provides fast IO performance due to no mechanical movement whereas it has wearable characteristics and does not provide in place update. In order to manage space efficiency of SSD, data de-duplication technique is frequently used. However, this technique occurs much overhead because it consists of data chunking, hasing and hash matching operations. In this paper, we propose new data de-duplication method using PRAM cache. The proposed method uses hierarchical hash tables and LRU(Least Recently Used) for data replacement in PRAM. First hash table in DRAM is used to store hash values of data cached in the PRAM and second hash table in PRAM is used to store hash values of data in SSD storage. The method also enhance data reliability against power failure by maintaining backup of first hash table into PRAM. Experimental results show that average writing frequency and operation time of the proposed method are 44.2% and 38.8% less than those of existing data de-depulication method, respectively, when three workloads are used.
Keywords
PRAM cache; Solid State Disk; data de-duplication; LRU;
Citations & Related Records
연도 인용수 순위
  • Reference
1 B. Debnath, S. Sengupta, J. Li, "ChunkStash: S peeding up Inline Storage Deduplication using Flash Memory," USENIX ATC'10, 2010.
2 H. J. Lee, K. H. Lee, and S. H. Noh. "Augmenting RAID with an SSD for Energy Relief." In Proc. of USENIX HotPower, 2008.
3 Man-Keun, S., K. Sungahn, P. Youngwoo and P. Kyu Ho, "NLE-FFS: A flash file system with PRAM for non-linear editing." IEEE Transaction Consumer Electronic, 55(4): 2016-2024., 2009.   DOI   ScienceOn
4 Chin-Hsien Wu, Hau-Shan Wu, "A data de-duplication access framework for solid state drives", SAC'11, Proceedings of the 2011 ACM Symposium on Applied Computing, pp.600-604, Mar, 2011.
5 S. Quinlan and S. Dorward, "Venti: a new approach to archival storage,"in Proceedings of the 1st USENIX conference on File and storage technologies, pp.89-101, 2002.
6 Seung-Kyu Lee, Yu-Seok Yang, Deok-Hwan Kim ,"Hybrid Data Deduplication Method for Reducing Wear-Level of SSD-based Server Storage", Journal of KIISE : Computer Systems and Theory, Vol 38, No 6, pp.292-297, Dec, 2011.
7 N. Agrawal, V. Prabhakan, T. Wobber, J. D. Davis, M. Manasse and R. Panigrahy, "Design Tradeoffs for SSD Performance," USENIX'08 ATC, pp.57-70, 2008.
8 Report to Congress on Server and Data enter Energy Efficiency Public Law 109-431, 2007.
9 H.S. Hun, Y.W. Ha and B.S. Cho, "A Study on the Policy Terends of Smart Grid in Major Nations," Electronics and Telecommunications Trends, Vol 25, No 3, pp.89-98, 2010
10 A. Gupta, R. Pisolka, B. Urgaonkar, and A. Sivasubramaniam, "Leveraging value locality in optimizing nand flash-based ssds", in Proceedings of the 9th USENIX conference on File and storage technologies, 2011.
11 F. Chen, T. Luo, and X. Zhang, "Caftl: a cont ent-aware flash translation layer enhancing the lifespan of flash memory based solid state drives" in Proceedings of the 9th USENIX conference on File and stroage technologies, 2011.
12 Chulmin Kim, et al. "GHOST: GPGPU-offloaded high performance storage I/O deduplication for primary storage system", in Proceedings of the 2012 International Workshop in Programming Models and Applications for Multicores and Manycores, pp 17-26, 2012.
13 S. Cho and H. Lee, "Flit-N-Write: A Simple Deterministic Technique to Improve PRAM Write Performance, Energy and Endurance," Proc. MICRO, 2009.
14 H. Chung, A 58nm 1.8V 1Gb PRAM with 6.4GB/S Program bandwidth, ISSCC 2011.
15 M. Lillibridge, K. Eshghi, D. Bhagwat, V. Deola-likar, G. Trezise, and P. Camble. "Sparse indexing: large scale, inline deduplication using sampling and locality," In Proc. 7th USENIX Conference on File and Storage Technologies, 2009.
16 Y, Choi, A 20nm 1.8V 8Gb PRAM with 40MB/S Program bandwidth, ISSCC 2012.
17 Benjamin C. Lee, Architecturing PCM as a scalable DRAM alternative, ISCA, 2009.
18 J. K. Kim et al., "A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems," in Proceedings of 2008, pp. 31-40, 2008.