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http://dx.doi.org/10.5573/ieek.2013.50.1.097

Method of SSO Noise Reduction on FPGA of Digital Optical Units in Optical Communication  

Kim, Jae Wan (Korea University)
Eom, Doo Seop (Korea University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.50, no.1, 2013 , pp. 97-101 More about this Journal
Abstract
There is a growing need for optical communication systems that convert large volumes of data to optical signals and that accommodate and transmit the signals across long distances. Digital optical communication consists of a master unit (MU) and a slave unit (SU). The MU transmits data to SU using digital optical signals. However, digital optical units that are commercially available or are under development transmit data using two's complement representation. At low input levels, a large number of SSOs (simultaneous switching outputs) are required because of the high rate of bit switching in two's complement, which thereby increases the power noise. This problem reduces the overall system capability because a DSP (digital signal processor) chip (FPGA, CPLD, etc.) cannot be used efficiently and power noise increases. This paper proposes a change from two's complement to a more efficient method that produces less SSO noise and can be applied to existing digital optical units.
Keywords
Low Power Noise; Field Programmable Gate Array; Digital Optical Unit; Noise Figure; Simultaneous Switching Outputs;
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